參數(shù)資料
型號: ALD7555PAL
廠商: Advanced Linear Devices Inc
文件頁數(shù): 1/12頁
文件大小: 0K
描述: IC TIMER CMOS ANLG RC SGL 8PDIP
標(biāo)準(zhǔn)包裝: 50
類型: 555 型,計(jì)時(shí)器/振蕩器(單路)
頻率: 2.5MHz
電源電壓: 2 V ~ 10 V
電流 - 電源: 50µA
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-DIP(0.300",7.62mm)
包裝: 管件
供應(yīng)商設(shè)備封裝: 8-PDIP
安裝類型: 通孔
其它名稱: 1014-1189
Rev 2.0 2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ADVANCED
LINEAR
DEVICES, INC.
SINGLE/DUAL CMOS ANALOG RC TIMER
GENERAL DESCRIPTION
The ALD7555/ALD7556 timers are high performance single/dual mono-
lithic analog RC timing circuits. They offer significantly upgraded perfor-
mance in speed, leakage currents, supply current, stability, temperature
voltage stability, and discharge output drive when compared to SE555/
NE555,ICL7555, TLC555, and ICM7555.
The ALD7555/ALD7556 offer the benefits of high input impedance, thereby
allowing smaller timing capacitors and a longer timing cycle; high speed;
low power dissipation for battery operated environment; reduced supply
current spikes, allowing smaller and lower cost decoupling capacitors.
Each timer is capable of producing accurate time delays and oscillations in
both monostable and astable operation, and operates in the one-shot
(monostable) mode or 50% duty cycle free running oscillation mode with a
single resistor R and one capacitor C. The inputs and outputs are fully
compatible with CMOS, NMOS or TTL logic.
There are three matched internal resistors (approximately 200K each)
that set the threshold and trigger levels at two-thirds and one-third respec-
tively of V+. These levels can be adjusted by using the control terminal.
When the trigger input is below the trigger level, the output is in the high
state and sourcing 2mA. When the threshold input is above the threshold
level at the same time the trigger input is above the trigger level, the internal
flip-flop is reset, the output goes to the low state and sinks up to 10mA. The
reset input overrides all other inputs and when it is active (reset voltage less
than 1V), the output is in the low state. The discarge output has been
signifcantly enhanced to eliminate the need for a separate external driver.
FEATURES
Improved accuracy and temperature stability
High speed operation -- 2.5MHz typical oscillation at 5V
High Discharge Sinking Current of 80mA at 5V
Guaranteed low operating supply voltage of 2V to 10V
Functional equivalent to and same pin-out as NE555/NE556,
SE555, TLC555, ICM7555/ICM7556
Greatly expanded high and low frequency ranges
High speed, low power, monolithic CMOS technology
Low supply current, typically: 50A for ALD7555, 100A for ALD7556
Extremely low trigger, threshold and reset currents 10pA typical
Operates in both monostable and astable modes
Fixed 50% duty cycle or adjustable duty cycle
CMOS, NMOS and TTL compatible input/output
Low supply current spikes
Rail to rail output
High speed one-shot (monostable)
Precision sequential timing
Long delay timer
Pulse width and pulse position modulation
Missing pulse detector
Frequency divider
Synchronized timer
ALD7555/ALD7556
BENEFITS
Saves battery power
Eliminates additional buffer
Smaller, lower cost capacitor
Extended range of time constants
APPLICATIONS
BLOCK DIAGRAM (EACH TIMER)
OUTPUT
(3)
DISCHARGE
(7)
RESET
(4)
R
S
R
TRIGGER
(2)
GND
(1)
CONTROL
(5)
THRESHOLD
(6)
V+
(8)
* Contact factory for leaded (non-RoHS) or high temperature versions.
Operating Temperature Range *
0°C to +70°C0°C to +70°C
-55°C to +125°C
8-Pin Small Outline
8-Pin Plastic
8-Pin CERDIP
Package (SOIC)
DIP Package
Package
ALD7555SAL
ALD7555PAL
ALD7555DA
14-Pin Small Outline
14-Pin Plastic
14-Pin CERDIP
Package (SOIC)
DIP Package
Package
ALD7556SBL
ALD7556PBL
ALD7556DB
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
PIN CONFIGURATION
SAL, PAL, DA PACKAGES
1
2
3
4
8
7
6
5
GND
TRIG
OUT
RST
V+
DISC
THRES
CONT
ALD7555
SBL, PBL, DB PACKAGES
DSC1
THRES1
CONT1
RST1
OUT1
TRIG1
GND
TRIG2
OUT2
RST2
CONT2
THRES2
DSC2
V+
2
3
4
5
6
7
9
10
11
12
13
14
1
8
ALD7556
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