參數(shù)資料
型號: ALD555SAL
廠商: Advanced Linear Devices Inc
文件頁數(shù): 1/7頁
文件大?。?/td> 0K
描述: IC TIMER PREC CMOS SGL HS 8SOIC
標(biāo)準(zhǔn)包裝: 50
類型: 555 型,計(jì)時(shí)器/振蕩器(單路)
頻率: 2MHz
電源電壓: 2 V ~ 12 V
電流 - 電源: 100µA
工作溫度: 0°C ~ 70°C
封裝/外殼: 8-SOIC(0.154",3.90mm 寬)
包裝: 管件
供應(yīng)商設(shè)備封裝: 8-SOIC
安裝類型: 表面貼裝
其它名稱: 1014-1188
Rev 2.0 2010 Advanced Linear Devices, Inc. 415 Tasman Drive, Sunnyvale, CA 94089-1706 Tel: (408) 747-1155 Fax: (408) 747-1286
www.aldinc.com
ADVANCED
LINEAR
DEVICES, INC.
ALD555
BLOCK DIAGRAM
OUTPUT
(3)
DISCHARGE
(7)
RESET
(4)
R
S
R
TRIGGER
(2)
GND
(1)
CONTROL
(5)
THRESHOLD
(6)
V+
(8)
* Contact factory for leaded (non-RoHS) or high temperature versions.
Operating Temperature Range *
0°C to +70°C0°C to +70°C
-55°C to +125°C
8-Pin Small Outline
8-Pin Plastic
8-Pin CERDIP
Package (SOIC)
DIP Package
Package
ALD555SAL
ALD555PAL
ALD555DA
ORDERING INFORMATION (“L” suffix denotes lead-free (RoHS))
HIGH SPEED CMOS TIMER
GENERAL DESCRIPTION
The ALD555 timer is a high performance monolithic timing circuit built
with advanced silicon gate CMOS technology. It offers the benefits of
high input impedance, thereby allowing smaller timing capacitors and
longer timing cycle; high speed, with typical cycle time of 500ns; low
power dissipation for battery operated environment; reduced supply
current spikes, allowing smaller and lower cost decoupling capacitors.
It is capable of producing accurate time delays and oscillations in both
monostable and astable operation. It operates in the one-shot (mono-
stable) mode or 50% duty cycle free running oscillation mode with a
single resistor and one capacitor. The inputs and outputs are fully
compatible with CMOS, NMOS or TTL logic.
There are three matched internal resistors (approximately 200K
each) that set the threshold and trigger levels at two-thirds and one-
third respectively of V+
.
These levels can be adjusted by using the
control terminal (pin 5). When the trigger input is below the trigger level,
the output is in the high state and sourcing 2mA. When threshold input
is above the threshold level at the same time the trigger input is above
the trigger level, the internal flip-flop is reset, the output goes to the low
state and sinks up to 10mA. The reset input overrides all other inputs
and when it is active (reset voltage less than 1V), the output is in the
low state.
FEATURES
Functional equivalent to NE555 with greatly expanded high
and low frequency ranges
High speed, low power, monolithic CMOS technology
Low supply current: 100A typical
Extremely low trigger, threshold and reset currents:1pA typical
High speed operation -- 2MHz oscillation
Low operating supply voltage of 2 to 12V
Operates in both monostable and astable modes
Fixed 50% duty cycle or adjustable duty cycle
CMOS, NMOS and TTL compatible input/output
High discharge sinking current of 80mA
Low supply current spikes
PIN CONFIGURATION
GROUND
TRIGGER
OUTPUT
RESET
DISCHARGE
THRESHOLD
7
CONTROL
3
1
2
4
6
8
5
V+
APPLICATIONS
High speed one-shot (monostable)
pulse generation
Precision timing
Sequential timing
Long delay timer
Pulse width and pulse position
modulation
Missing pulse detector
Frequency divider
SAL, PAL, DA PACKAGES
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