參數(shù)資料
型號(hào): ALD500RA-20PEI
廠商: Advanced Linear Devices, Inc.
英文描述: PRECISION INTEGRATING ANALOG PROCESSOR WITH PRECISION VOLTAGE REFERENCE
中文描述: 精密集成了模擬處理器,高精度電壓基準(zhǔn)
文件頁(yè)數(shù): 11/12頁(yè)
文件大?。?/td> 93K
代理商: ALD500RA-20PEI
ALD500RAU/ALD500RA/ALD500R
Advanced Linear Devices
11
EQUATIONS AND DERIVATIONS
Dual Slope Analog Processor equations and derivations
are as follows:
0
20x10
-6
=
=
DESIGN EXAMPLES
We now apply these equations in the following
design examples.
Design Example 1:
1. Pick resolution = 16 bit.
2. Pick t
INT
= 4x60Hz
3. Pick clock period = 1.08507
μ
s and number of counts
4. Pick V
IN
MAX value, e.g., V
IN
MAX = 2.0 V
I
B
MAX = 20
μ
A R
INT
= 2.0
5. Applying equation (3) to calculate C
INT:
6. Pick C
REF
and C
AZ
C
INT
: C
REF
=
AZ
=
μ
F
7. Pick t
DINT
= 2
x t
INT
= 133.3333 msec
8. Calculate V
REF
V
INT
MAX
.
C
INT
.
R
INT
t
DINT
MAX
4 x 0.33 x 10
-6
x 100 x 10
3
133.3333 x 10
-3
1.00V
= 0.0666667 sec.
V
V
1
R
INT
.
C
INT
For V
IN
(t) = V
IN (constant):
V
IN
(t)dt =
t
INT
t
DINT
t
INT
V
IN
= V
REF
.
1
t
INT
.
V
IN
=V
REF
.
t
DINT
(2a)
(2)
(1)
C
INT
=
V
INT
t
INT
.
I
B
(3)
R
INT
=
V
IN
MAX
I
B
MAX
(4)
From equation (2a),
OR
Rearranging equations (3) and (4):
At V
INT =
V
INT
MAX, equation (6) becomes:
Combining (6a) and (7):
In equation (5b), substituting equation (8) for t
INT
:
For t
DINT
MAX = 2 x t
INT
,
equation (9) becomes:
C
INT
.
V
INT
MAX
.
R
INT
2t
INT
V
IN
MAX
.
t
INT
t
DINT
MAX
V
IN
.
t
INT
t
DINT
(5a)
(5b)
t
INT
=
C
INT
.
V
INT
I
B
(6)
I
B
MAX =
V
IN
MAX
R
INT
(7)
V
REF
=
V
REF
=
... t
INT
=C
INT
.
V
INT
MAX
.
R
INT
V
IN
MAX
(8)
V
IN
MAX
.
t
DINT
MAX
V
REF
=
C
INT
.
V
INT
MAX
.
R
INT
V
IN
MAX
=
C
INT
.
V
INT
MAX
.
R
INT
t
DINT
MAX
(9)
V
REF
=
(10)
R
INT
.
C
INT
R
INT
.
C
INT
V
REF
.
t
DINT
R
INT
.
C
INT
...
t
INT
=C
INT
.
V
INT
MAX
I
B
MAX
and
At V
IN
MAX, the current I
B
is also at a maximum level,
for a given R
INT
value:
V
IN
I
B
=
(6a)
C
INT
= (0.0666667)(20x10
-6
)/4 where V
INT
= 4.0V
0.33
μ
F
Design Example 2:
1. Select resolution of 17 bit. Total number of
counts during t
INT
is131,072.
2. We can pick t
INT
of 16.6667 msec. x 5 = 83.3333 msec.
or alternately, pick t
INT
equal
16.6667 msec. x 6 = 100.00 msec.
(for 60 Hz rejection)
which is t
INT
= 20.00 msec. x 5
Therefore, using t
INT
= 100 msec. would achieve
both 50 Hz and 60 Hz cycle noise rejection. For this
example, the following calculations would assume
t
INT
of 100 msec. Now select period equal to
0.5425
μ
sec. (clock frequency of 1.8432 MHz)
= 66.6667ms
= 100.00 msec. (for 50 Hz rejection)
0.0666667
1.08507x10
-6
over t
INT
=
= 61440
=
=
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