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參數(shù)資料
| 型號： | AK6510CM |
| 元件分類： | EEPROM |
| 英文描述： | EEPROM |
| 中文描述： | EEPROM的 |
| 文件頁數(shù)： | 8/17頁 |
| 文件大?。?/td> | 123K |
| 代理商： | AK6510CM |
ASAHI KASEI
[AK6510C/12C]
DAP02E-02
2002/07
- 8 -
WRITE (WRITE SEQUENCE)
WRITE instruction can start the WRITE function to the memory cell array.
After CS pin changes high to low, op-code, address and data are input from SI pin. After the
instruction input, the internal programming cycle starts when CS pin changes low to high. After the
instructions are inputted, CS pin should change low to high after the last data bit (D0) inputs and
before next SCK clock rises. Write function can start only at this timing.
AK6510C/12C can indicate the BUSY status by using RDSR instruction and READ the RDY bit (Bit0)
in the status register. RDY is "1" indicates AK6510C/12C is in the programming cycle, and RDY is
"0" indicates AK6510C/12C is in the READY status. AK6510C/12C outputs the "FF" when RDSR
instruction executes during the programming cycle. Only RDSR instruction can be accepted during
programming cycle.
AK6510C/12C has Page Write mode, which can write the data within 32 bytes with one programming
cycle. The input data sent to the shift register within 32 bytes. If the number of bytes exceeded 32,
the address counter rolls over to the first address of the page.
Internal programming cycle starts after CS pin changes low to high.
After WRITE instruction, AK6510C/12C changes to Write Disable status automatically.
AK6510C/12C needs WREN instruction before every WRITE instruction. When WRITE instruction
is done while AK6510C/12C is in Write Disable status, WRITE instructions are ignored and
AK6510C/12C becomes standby status after CS changes to high. AK6510C/12C can accept the
next instruction after CS becomes low.
WRITE instruction cannot write the data into the address of the protected block.
WRITE
Hi-Z
32
33
34
35
36
37
38
39
40
0
1
2
3
4
5
6
7
8
9
10
11
12
13
23
22
0
0
0
0
0
1
0
A0
A1
A10
Hi-Z
CS
SCK
SI
SO
A11
24
25
30
31
D0
D1
D6
D7
Data(n)
CS
SCK
SI
SO
X = don’t care
Data(n+1)
D0
D1
D6
D7
D4
D5
D3
D2
D7
Data(n+31)
D0
D0
D1
D6
D7
D4
D5
D3
D2
A12
X
X
X
X
AK6510C: A12 is don't care
相關PDF資料 |
PDF描述 |
|---|---|
| AK6512CL | EEPROM |
| AK6512CM | EEPROM |
| AK681024G-10 | x8 SRAM Module |
| AK681024G-55 | x8 SRAM Module |
| AK681024G-70 | x8 SRAM Module |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AK6512C | 制造商:AKM 制造商全稱:AKM 功能描述:SPI bus 32K/64Kbit Serial CMOS EEPROM |
| AK6512CA | 制造商:AKM 制造商全稱:AKM 功能描述:SPI bus 64Kbit Serial CMOS EEPROM |
| AK6512CAL | 制造商:AKM 制造商全稱:AKM 功能描述:SPI bus 64Kbit Serial CMOS EEPROM |
| AK6512CAM | 制造商:AKM 制造商全稱:AKM 功能描述:SPI bus 64Kbit Serial CMOS EEPROM |
| AK6512CL | 制造商:AKM 制造商全稱:AKM 功能描述:8pin SONW |
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