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參數(shù)資料
| 型號(hào)： | AK4532P-E2 |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PDSO24 |
| 封裝： | 0.65 MM PITCH, PLASTIC, VSOP-24 |
| 文件頁數(shù)： | 6/17頁 |
| 文件大小： | 239K |
| 代理商： | AK4532P-E2 |
ASAHI KASEI
[AK4532]
0178-E-02
14
2004/12
System Design
Figure 2 shows the system connection diagram. An evaluation board is available which demonstrates the
optimum layout, power supply arrangements and measurement results.
PD
LRCK
DGND
AGND
VD
Synth.
Controller
+5V
Analog
VA
AK4532
LOUT
0.1u
4.7u
+
VRAD
SCLK
SDI
Analog
Out
Lch
4.7u
+
0.1u
ROUT
Analog
Out
Rch
VCOM
CMODE
CDATA
CCLK
CS
13
1
19
20
7
9
10
11
18
17
16
15
24
2
14
MCLK
8
SDO
12
&
4.7u
+
0.1u
21
AINFL 22
MIC/AUXR 3
AUXL 4
LineR 5
LineL 6
AINFR 23
10
Figure 2. Typical Connection Diagram
1.
Grounding and power supply decoupling
The AK4532 requires careful attention to power supply and grounding arrangements. VD should be
supplied from analog power supply. Analog ground and digital ground should be connected
together near to where the supplies are brought onto the printed circuit board. Decoupling
capacitors should be as near to the AK4532 as possible, with the small value ceramic capacitor
being the nearest.
2.
On-chip voltage reference
The on-chip voltage references are output on the VRAD and VCOM pins for decouping .
The VRAD is used as the reference of A/D conversion. The VCOM is a signal ground of this chip. An
electrolytic capacitor less than 10uF in parallel with a 0.1uF ceramic capacitor attached to these
pins eliminates the effects of high frequency noise. Especially, the small value ceramic capacitors
should be as near to the AK4532 as possible. No load current may be drawn from the VRAD and
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