參數(shù)資料
型號: AIC1574CS
廠商: Analog Integrations Corporation
英文描述: 5-bit DAC, Synchronous PWM Power Regulator with Triple Linear Controllers
中文描述: 5位DAC,同步PWM電源穩(wěn)壓器與線性控制器三
文件頁數(shù): 1/20頁
文件大?。?/td> 381K
代理商: AIC1574CS
AIC1574
5-bit DAC, Synchronous PWM Power Regulator
with Triple Linear Controllers
Analog Integrations Corporation
4F, 9, Industry E. 9th Rd, Science Based Industrial Park, Hsinchu Taiwan, ROC
www.analog.com.tw
DS-1574-00 May 22, 01
TEL: 886-3-5772500
FAX: 886-3-5772510
1
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FEATURES
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Compatible with HIP6021.
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Provides 4 Regulated Voltages for Microprocessor
Core, AGP Bus, Memory and GTL Bus Power.
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TTL Compatible 5-bit Digital-to-Analog Core Output
Voltage Selection. Range from 1.3V to 3.5V.
0.1V Steps from 2.1V to 3.5V.
0.05V Steps from 1.3V to 2.05V.
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±
1.0% Output Voltage for VCORE,
±
3.0% Accu-
racy for Linear Controller Outputs.
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Simple Voltage-Mode PWM Control and Built in
Internal Compensation Networks.
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N-Channel MOSFET Driver for PWM Buck Con-
verter.
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Linear Controller Drives Compatible with both N–
Chanel MOSFET and NPN Bipolar Series Pass
Transistor.
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Operates from +3.3V, +5V and +12V Inputs.
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Fast Transient Response.
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Full 0% to 100% Duty Ratios.
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Adjustable Current Limit without External Sense
Resistor.
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Microprocessor Core Voltage Protection against
Upper MOSFET shorted to +5V.
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Power Good Output Voltage Monitor.
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Over-Voltage and Over-Current Fault Monitors.
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200KHz Free-Running Oscillator Programmable up
to 700KHz.
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APPLICATIONS
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Full Motherboard Power Regulation for Computers.
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DESCRIPTION
The AIC1574 combines a synchronous voltage mode
controller with three linear controller as well as the
monitoring and protection functions in this chip. The
PWM controller regulates the microprocessor core
voltage with a synchronous rectified buck converter.
The three linear controllers regulate power for the
1.5V or 3.3V AGP bus power, the 1.5V GTL bus and
the 1.8V power for the chip set core voltage and/or
cache memory circuits.
An integrated 5 bit D/A converter that adjusts the
core PWM output voltage from 2.1V to 3.5V in 0.1V
increments and from 1.3V to 2.05V in 0.05V incre-
ments. The linear controller for AGP bus power is
selectable by TTL-compatible SELECT pin status for
1.5V or 3.3V with
±
3% accuracy. The other two
linear controller provide 1.5V
±
3% and 1.8V
±
3% or
adjustable output voltage by means of external d-
vided resistor based on FIX pin status.
This chip monitors all the output voltages. Power
Good signal is issued when the core voltage is
within ±10% of the DAC setting and the other levels
are above their under-voltage levels. Over-voltage
protection for the core output uses the lower N-
channel MOSFET to prevent output voltage above
116% of the DAC setting.
The PWM over-current function monitors the output
current by using the voltage drop across the upper
MOSFET’ s R
DS(ON)
, eliminating the need for a cur-
rent sensing resistor
.
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