2-24 Revision 16 Detailed I/O DC Characteristics Table 2-27 Input Capacitance Symbol Definitio" />
參數(shù)資料
型號: AGLP060V5-VQG176
廠商: Microsemi SoC
文件頁數(shù): 67/134頁
文件大小: 0K
描述: IC FPGA IGLOO PLUS 60K 176-VQFN
標準包裝: 60
系列: IGLOO PLUS
邏輯元件/單元數(shù): 1584
RAM 位總計: 18432
輸入/輸出數(shù): 137
門數(shù): 60000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 176-TQFP
供應商設(shè)備封裝: 176-VQFP(20x20)
IGLOO PLUS DC and Switching Characteristics
2-24
Revision 16
Detailed I/O DC Characteristics
Table 2-27 Input Capacitance
Symbol
Definition
Conditions
Min.
Max.
Units
CIN
Input capacitance
VIN = 0, f = 1.0 MHz
8
pF
CINCLK
Input capacitance on the clock pin
VIN = 0, f = 1.0 MHz
8
pF
Table 2-28 I/O Output Buffer Maximum Resistances 1
Standard
Drive Strength
RPULL-DOWN
(
) 2
RPULL-UP
(
) 3
3.3 V LVTTL / 3.3V LVCMOS
2 mA
100
300
4 mA
100
300
6 mA
50
150
8 mA
50
150
12 mA
25
75
16 mA
25
75
3.3 V LVCMOS Wide Range
100 A
Same as equivalent software default drive
2.5 V LVCMOS
2 mA
100
200
4 mA
100
200
6 mA
50
100
8 mA
50
100
12 mA
25
50
1.8 V LVCMOS
2 mA
200
225
4 mA
100
112
6 mA
50
56
8 mA
50
56
1.5 V LVCMOS
2 mA
200
224
4 mA
100
112
1.2 V LVCMOS
2 mA
157.5
163.8
1.2 V LVCMOS Wide Range4
100 A
157.5
163.8
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance values depend
on VCCI, drive strength selection, temperature, and process. For board design considerations and detailed output buffer
resistances, use the corresponding IBIS model on the Microsemi SoC Products Group website at
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec
4. Applicable to IGLOO PLUS V2 devices operating at VCCI
VCC.
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