Revision 16 2-21 Summary of I/O Timing Characteristics – Default I/O Software Settings Table 2-23 " />
參數資料
型號: AGLP030V2-CSG289
廠商: Microsemi SoC
文件頁數: 64/134頁
文件大?。?/td> 0K
描述: IC FPGA IGLOO PLUS 30K 289-CSP
標準包裝: 152
系列: IGLOO PLUS
邏輯元件/單元數: 792
輸入/輸出數: 120
門數: 30000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 70°C
封裝/外殼: 289-TFBGA,CSBGA
供應商設備封裝: 289-CSP(14x14)
IGLOO PLUS Low Power Flash FPGAs
Revision 16
2-21
Summary of I/O Timing Characteristics – Default I/O Software Settings
Table 2-23 Summary of AC Measuring Points
Standard
Measuring Trip Point (Vtrip)
3.3 V LVTTL / 3.3 V LVCMOS
1.4 V
3.3 V LVCMOS Wide Range
1.4 V
2.5 V LVCMOS
1.2 V
1.8 V LVCMOS
0.90 V
1.5 V LVCMOS
0.75 V
1.2 V LVCMOS
0.60 V
1.2 V LVCMOS Wide Range
0.60 V
Table 2-24 I/O AC Parameter Definitions
Parameter
Parameter Definition
tDP
Data to Pad delay through the Output Buffer
tPY
Pad to Data delay through the Input Buffer
tDOUT
Data to Output Buffer delay through the I/O interface
tEOUT
Enable to Output Buffer Tristate Control delay through the I/O interface
tDIN
Input Buffer to Data delay through the I/O interface
tHZ
Enable to Pad delay through the Output Buffer—High to Z
tZH
Enable to Pad delay through the Output Buffer—Z to High
tLZ
Enable to Pad delay through the Output Buffer—Low to Z
tZL
Enable to Pad delay through the Output Buffer—Z to Low
tZHS
Enable to Pad delay through the Output Buffer with delayed enable—Z to High
tZLS
Enable to Pad delay through the Output Buffer with delayed enable—Z to Low
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