1-2 Revision 17 Flash Advantages Low Power Flash-based IGLOO nano devices exhibit power characteristics similar " />
參數(shù)資料
型號: AGLN020V5-QNG68
廠商: Microsemi SoC
文件頁數(shù): 129/150頁
文件大?。?/td> 0K
描述: IC FPGA 20K 1.5V 68QFN
標準包裝: 260
系列: IGLOO nano
邏輯元件/單元數(shù): 520
輸入/輸出數(shù): 49
門數(shù): 20000
電源電壓: 1.425 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -20°C ~ 70°C
封裝/外殼: 68-VFQFN 裸露焊盤
供應商設備封裝: 68-QFN(8x8)
其它名稱: 1100-1127
IGLOO nano Device Overview
1-2
Revision 17
Flash Advantages
Low Power
Flash-based IGLOO nano devices exhibit power characteristics similar to those of an ASIC, making them
an ideal choice for power-sensitive applications. IGLOO nano devices have only a very limited power-on
current surge and no high-current transition period, both of which occur on many FPGAs.
IGLOO nano devices also have low dynamic power consumption to further maximize power savings;
power is reduced even further by the use of a 1.2 V core voltage.
Low dynamic power consumption, combined with low static power consumption and Flash*Freeze
technology, gives the IGLOO nano device the lowest total system power offered by any FPGA.
Security
Nonvolatile, flash-based IGLOO nano devices do not require a boot PROM, so there is no vulnerable
external bitstream that can be easily copied. IGLOO nano devices incorporate FlashLock, which provides
a unique combination of reprogrammability and design security without external overhead, advantages
that only an FPGA with nonvolatile flash programming can offer.
IGLOO nano devices utilize a 128-bit flash-based lock and a separate AES key to provide the highest
level of security in the FPGA industry for programmed intellectual property and configuration data. In
addition, all FlashROM data in IGLOO nano devices can be encrypted prior to loading, using the
industry-leading AES-128 (FIPS192) bit block cipher encryption standard. AES was adopted by the
National Institute of Standards and Technology (NIST) in 2000 and replaces the 1977 DES standard.
IGLOO nano devices have a built-in AES decryption engine and a flash-based AES key that make them
the most comprehensive programmable logic device security solution available today. IGLOO nano
devices with AES-based security provide a high level of protection for remote field updates over public
networks such as the Internet, and are designed to ensure that valuable IP remains out of the hands of
system overbuilders, system cloners, and IP thieves.
Security, built into the FPGA fabric, is an inherent component of IGLOO nano devices. The flash cells are
located beneath seven metal layers, and many device design and layout techniques have been used to
make invasive attacks extremely difficult. IGLOO nano devices, with FlashLock and AES security, are
unique in being highly resistant to both invasive and noninvasive attacks. Your valuable IP is protected
with industry-standard security, making remote ISP possible. An IGLOO nano device provides the best
available security for programmable logic designs.
Single Chip
Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed, the
configuration data is an inherent part of the FPGA structure, and no external configuration data needs to
be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based IGLOO nano
FPGAs do not require system configuration components such as EEPROMs or microcontrollers to load
device configuration data. This reduces bill-of-materials costs and PCB area, and increases security and
system reliability.
Instant On
Microsemi flash-based IGLOO nano devices support Level 0 of the Instant On classification standard.
This feature helps in system component initialization, execution of critical tasks before the processor
wakes up, setup and configuration of memory blocks, clock generation, and bus activity management.
The Instant On feature of flash-based IGLOO nano devices greatly simplifies total system design and
reduces total system cost, often eliminating the need for CPLDs and clock generation PLLs. In addition,
glitches and brownouts in system power will not corrupt the IGLOO nano device's flash configuration,
and unlike SRAM-based FPGAs, the device will not have to be reloaded when system power is restored.
This enables the reduction or complete removal of the configuration PROM, expensive voltage monitor,
brownout detection, and clock generator devices from the PCB design. Flash-based IGLOO nano
devices simplify total system design and reduce cost and design risk while increasing system reliability
and improving system initialization time.
IGLOO nano flash FPGAs enable the user to quickly enter and exit Flash*Freeze mode. This is done
almost instantly (within 1 s) and the device retains configuration and data in registers and RAM. Unlike
SRAM-based FPGAs, the device does not need to reload configuration and design state from external
memory components; instead it retains all necessary information to resume operation immediately.
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