2-88 Revision 13 Global Resource Characteristics AGLE600 Clock Tree Topology Clock delays are device-speci" />
參數(shù)資料
型號(hào): AGLE600V2-FGG484I
廠商: Microsemi SoC
文件頁數(shù): 5/166頁
文件大?。?/td> 0K
描述: IC FPGA 1KB FLASH 600K 484-FBGA
標(biāo)準(zhǔn)包裝: 60
系列: IGLOOe
邏輯元件/單元數(shù): 13824
RAM 位總計(jì): 110592
輸入/輸出數(shù): 270
門數(shù): 600000
電源電壓: 1.14 V ~ 1.575 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 85°C
封裝/外殼: 484-BGA
供應(yīng)商設(shè)備封裝: 484-FPBGA(23x23)
IGLOOe DC and Switching Characteristics
2-88
Revision 13
Global Resource Characteristics
AGLE600 Clock Tree Topology
Clock delays are device-specific. Figure 2-39 is an example of a global tree used for clock routing. The
global tree presented in Figure 2-39 is driven by a CCC located on the west side of the AGLE600 device.
It is used to drive all D-flip-flops in the device.
Figure 2-39 Example of Global Tree Use in an AGLE600 Device for Clock Routing
Central
Global Rib
VersaTile
Rows
Global Spine
CCC
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