參數(shù)資料
型號: AGLE600V2-FG256C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝: 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 92/156頁
文件大?。?/td> 5023K
代理商: AGLE600V2-FG256C
IGLOOe DC and Switching Characteristics
2- 26
Advance v0.3
2.5 V GTL+
33 mA
15
HSTL (I)
8 mA
50
HSTL (II)
15 mA
25
SSTL2 (I)
15 mA
27
31
SSTL2 (II)
18 mA
13
15
SSTL3 (I)
14 mA
44
69
SSTL3 (II)
21 mA
18
32
Table 2-28 I/O Weak Pull-Up/Pull-Down Resistances
Minimum and Maximum Weak Pull-Up/Pull-Down Resistance Values
VCCI
R((WEAK PULL-UP)
1
(
Ω)
R(WEAK PULL-DOWN)
2
(
Ω)
Min.
Max.
Min.
Max.
3.3 V
10 k
45 k
10 k
45 k
2.5 V
11 k
55 k
12 k
74 k
1.8 V
18 k
70 k
17 k
110 k
1.5 V
19 k
90 k
19 k
140 k
1.2 V
TBD
Notes:
1. R(WEAK PULL-DOWN-MAX) = (VOLspec) / IWEAK PULL-DOWN-MIN
2. R(WEAK PULL-UP-MAX) = (VCCImax – VOHspec) / IWEAK PULL-UP-MIN
Table 2-27 I/O Output Buffer Maximum Resistances1 (continued)
Standard
Drive Strength
RPULL-DOWN (Ω)
2
RPULL-UP (Ω)
3
Notes:
1. These maximum values are provided for informational reasons only. Minimum output buffer resistance
values depend on VCCI, drive strength selection, temperature, and process. For board design considerations
and detailed output buffer resistances, use the corresponding IBIS models located on the Actel website at
http://www.actel.com/techdocs/models/ibis.html.
2. R(PULL-DOWN-MAX) = (VOLspec) / IOLspec
3. R(PULL-UP-MAX) = (VCCImax – VOHspec) / IOHspec
相關(guān)PDF資料
PDF描述
AGLE600V2-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FFG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
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AGLE600V5-FFGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
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