參數(shù)資料
型號： AGLE600V2-FFGG256C
元件分類： FPGA
英文描述： FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝： 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-256
文件頁數(shù)： 65/156頁
文件大小： 5023K
代理商： AGLE600V2-FFGG256C
IGLOOe DC and Switching Characteristics
2- 2
A d vance v0.3
Table 2-2
Recommended Operating Conditions 4
Symbol
Parameter
Commercial
Industrial
Units
TA
Ambient Temperature
0 to +70 6
–40 to +85 7
°C
TJ
Junction Temperature 8
0 to + 85
–40 to +100
VCC
1.5
V
DC
core
supply
voltage1
1.425 to 1.575
V
1.2 V–1.5 V wide range core
voltage2
1.14 to 1.575
V
VJTAG
JTAG DC voltage
1.4 to 3.6
V
VPUMP
5
Programming voltage
Programming Mode
3.15 to 3.45
V
Operation3
0 to 3.45
V
VCCPLL
9
Analog power supply (PLL)
1.5 V DC core supply voltage1
1.4 to 1.6
V
1.2 V–1.5 V wide range core
voltage2
1.14 to 1.575
V
VCCI and
VMV 10
1.2 V DC supply voltage2
1.14 to 1.26
V
1.5 V DC supply voltage
1.425 to 1.575
1.8 V DC supply voltage
1.7 to 1.9
V
2.5 V DC supply voltage
2.3 to 2.7
V
3.3 V DC supply voltage
3.0 to 3.6
V
LVDS differential I/O
2.375 to 2.625
V
LVPECL differential I/O
3.0 to 3.6
V
Notes:
1. For IGLOOe V5 devices
2. For IGLOOe V2 devices only, operating at VCCI ≥ VCC
3. The ranges given here are for power supplies only. The recommended input voltage ranges specific to each
I/O standard are given in Table 2-20 on page 2-20. VCCI should be at the same voltage within a given I/O
bank.
4. All parameters representing voltages are measured with respect to GND unless otherwise specified.
5. VPUMP can be left floating during operation (not programming mode).
6. Maximum TJ = 85 °C.
7. Maximum TJ = 100 °C.
8. To ensure targeted reliability standards are met across ambient and junction operating temperatures, Actel
recommends that the user follow best design practices using Actel’s timing and power simulation tools.
9. VCCPLL pins should be tied to VCC pins. See Pin Descriptions for further information.
10. VMV pins must be connected to the corresponding VCCI pins. See Pin Descriptions for further information.
Table 2-3
Flash Programming Limits – Retention, Storage, and Operating Temperature1
Product Grade
Programming
Cycles
Program Retention
(biased/unbiased)
Maximum Storage
Temperature TSTG (°C)
2
Maximum Operating Junction
Temperature TJ (°C)
2
Commercial
500
20 years
110
100
Industrial
500
20 years
110
100
Notes:
1. This is a stress rating only; functional operation at any condition other than those indicated is not implied.
2. These limits apply for program/data retention only. Refer to Table 2-1 on page 2-1 and Table 2-2 for device
operating conditions and absolute limits.
相關(guān)PDF資料
PDF描述
AGLE600V2-FFGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V5-FFG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AGLE600V2-FFGG896 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896ES 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896I 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FFGG896PP 制造商:ACTEL 制造商全稱:Actel Corporation 功能描述:IGLOOe Low-Power Flash FPGAs with Flash Freeze Technology
AGLE600V2-FG256 功能描述:IC FPGA 1KB FLASH 600K 256-FBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - FPGA（現(xiàn)場可編程門陣列） 系列:IGLOOe 標準包裝:40 系列:SX-A LAB/CLB數(shù):6036 邏輯元件/單元數(shù):- RAM 位總計:- 輸入/輸出數(shù):360 門數(shù):108000 電源電壓:2.25 V ~ 5.25 V 安裝類型:表面貼裝 工作溫度:0°C ~ 70°C 封裝/外殼:484-BGA 供應(yīng)商設(shè)備封裝:484-FPBGA（27X27）
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*