參數(shù)資料
型號: AGLE600V2-FFG256C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA256
封裝: 17 X 17 MM, 1.60 MM HEIGHT, 1 MM PITCH, FBGA-256
文件頁數(shù): 106/156頁
文件大?。?/td> 5023K
代理商: AGLE600V2-FFG256C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-39
Timing Characteristics
1.5 V DC Core Voltage
Table 2-53 1.5 V LVCMOS Low Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
Drive Strength
Speed
Grade tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS Units
2 mA
Std.
0.98
7.82
0.19 1.50 1.82
0.67
7.97
6.49
2.89 2.41 11.60 10.12
ns
4 mA
Std.
0.98
6.72
0.19 1.50 1.82
0.67
6.84
5.71
3.17 2.96 10.47
9.34
ns
6 mA
Std.
0.98
6.32
0.19 1.50 1.82
0.67
6.44
5.56
3.24 3.11 10.07
9.19
ns
8 mA
Std.
0.98
6.24
0.19 1.50 1.82
0.67
6.36
5.56
3.33 3.66
9.99
9.19
ns
12 mA
Std.
0.98
6.24
0.19 1.50 1.82
0.67
6.36
5.56
3.33 3.66
9.99
9.19
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
Table 2-54 1.5 V LVCMOS High Slew – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 1.4 V
Drive Strength
Speed
Grade
tDOUT
tDP
tDIN
tPY
tPYS tEOUT
tZL
tZH
tLZ
tHZ
tZLS
tZHS
Units
2 mA
Std.
0.98
3.34 0.19 1.50 1.82
0.67
3.41 3.07 2.88 2.50 7.04
6.70
ns
4 mA
Std.
0.98
2.88 0.19 1.50 1.82
0.67
2.94 2.57 3.17 3.05 6.57
6.20
ns
6 mA
Std.
0.98
3.90 0.19 1.50 1.82
0.67
3.97 3.79 3.17 3.20 7.60
7.42
ns
8 mA
Std.
0.98
2.77 0.19 1.50 1.82
0.67
2.82 2.35 3.33 3.78 6.45
5.98
ns
12 mA
Std.
0.98
2.77 0.19 1.50 1.82
0.67
2.82 2.35 3.33 3.78 6.45
5.98
ns
Notes:
1. Software default selection highlighted in gray.
2. For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
相關PDF資料
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AGLE600V2-FFG484C FPGA, 13824 CLBS, 600000 GATES, PBGA484
AGLE600V2-FFGG256C FPGA, 13824 CLBS, 600000 GATES, PBGA256
AGLE600V2-FFGG484C FPGA, 13824 CLBS, 600000 GATES, PBGA256
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