
Device Architecture
2-176
Revision 4
The length of time an I/O can withstand IOSH/IOSL events depends on the junction temperature. The
reliability data below is based on a 3.3 V, 36 mA I/O setting, which is the worst case for this type of
analysis.
For example, at 100°C, the short current condition would have to be sustained for more than six months
to cause a reliability concern. The I/O design does not contain any short circuit protection, but such
protection would only be needed in extremely prolonged stress conditions.
2.5 V LVCMOS
2 mA
16
18
4 mA
16
18
6 mA
32
37
8 mA
32
37
12 mA
65
74
16 mA
83
87
24 mA
169
124
1.8 V LVCMOS
2 mA
9
11
4 mA
17
22
6 mA
35
44
8 mA
45
51
12 mA
91
74
16 mA
91
74
1.5 V LVCMOS
2 mA
13
16
4 mA
25
33
6 mA
32
39
8 mA
66
55
12 mA
66
55
3.3 V PCI/PCI-X
Per PCI/PCI-X
specification
103
109
Applicable to Standard I/O Banks
3.3 V LVTTL / 3.3 V LVCMOS
2 mA
25
27
4 mA
25
27
6 mA
51
54
8 mA
51
54
2.5 V LVCMOS
2 mA
16
18
4 mA
16
18
6 mA
32
37
8 mA
32
37
1.8 V LVCMOS
2 mA
9
11
4 mA
17
22
1.5 V LVCMOS
2 mA
13
16
Table 2-98 I/O Short Currents IOSH/IOSL (continued)
Drive Strength
IOSH (mA)*
IOSL (mA)*
Note: *TJ = 100°C