參數(shù)資料
型號(hào)： AFE1124
英文描述： LJT 12C 8#20 4#16 SKT WALL REC
中文描述： HDSL / MDSL模擬前端
文件頁數(shù)： 2/11頁
文件大?。?/td> 160K
代理商： AFE1124
2
AFE1124
SPECIFICATIONS
Typical at 25
°
C, AV
DD
= +5V, DV
DD
= +3.3V, f
tx
= 584kHz (E1 rate), unless otherwise noted.
AFE1124E
PARAMETER
COMMENTS
MIN
TYP
MAX
UNITS
RECEIVE CHANNEL
Number of Inputs
Input Voltage Range
Common-Mode Voltage
Input Impedance All Inputs
Input Capacitance
Input Gain Matching
Resolution
Programmable Gain
Settling Time for Gain Change
Gain + Offset Error
Output Data Coding
Output Symbol Rate, rxSYNC
(3)
Output Bit Rate, rxSYNC
(3)
Differential
2
Balanced Differential
(1)
±
3.0
AV
/2
V
V
See Typical Performance Curves
10
±
2
14
0
6
5
pF
%
Bits
dB
Line Input vs Hybrid Input
0dB, 3dB, 6dB, 9dB and 12dB
+12
Symbol Periods
%FSR
(2)
Tested at Each Gain Range
Two’s Complement
32
64
584
1168
kHz
kbits/sec
TRANSMIT CHANNEL
Transmit Clock Rate, f
tx
T1 Transmit –3dB Point
T1 Rate Power
(4, 5)
E1 Transmit –3dB Point
E1 Transmit Power
(4, 5)
Pulse Output
Common-Mode Voltage, V
CM
Output Resistance
(6)
Symbol Rate
32
584
kHz
kHz
dBm
kHz
dBm
ETSI RTR/TM – Compliant
See Test Method Section, txBoost = 0
ETSI RTR/TM – Compliant
See Test Method Section, txBoost = 0
196
13
14
292
13
14
See Typical Performance Curves
AV
DD
/2
1
V
DC to 1MHz
TRANSCEIVER PERFORMANCE
Uncancelled Echo
(5)
rxGAIN = 0dB, Loopback Enabled
rxGAIN = 0dB, Loopback Disabled
rxGAIN = 3dB, Loopback Disabled
rxGAIN = 6dB, Loopback Disabled
rxGAIN = 9dB, Loopback Disabled
rxGAIN = 12dB, Loopback Disabled
–71
–71
–74
–76
–78
–80
–68.5
–68.5
–71
–73.5
–75.5
–77.5
dB
dB
dB
dB
dB
dB
DIGITAL INTERFACE
(6)
Logic Levels
V
IH
V
IL
V
OH
V
t
rx1
Interface
POWER
Analog Power Supply Voltage
Analog Power Supply Voltage
Digital Power Supply Voltage
Digital Power Supply Voltage
Power Dissipation
(4, 5)
Power Dissipation
(4, 5)
PSRR
|I
IH
| < 10
μ
A
|I
IL
| < 10
μ
A
I
OH
= –20
μ
A
I
OL
= 20
μ
A
DV
–1
–0.3
DV
DD
–0.5
DV
+0.3
+0.8
V
V
V
V
ns
+0.4
14
9
Specification
Operating Range
Specification
Operating Range
AV
DD
= 5V, DV
DD
= 3.3V,
AV
DD
= DV
DD
= 5V
5
V
V
V
V
4.75
5.25
3.3
3.15
5.25
250
300
55
mW
mW
dB
TEMPERATURE RANGE
Operating
(6)
–40
+85
°
C
NOTES: (1) With a balanced differential signal, the positive input is 180
°
out of phase with the negative input, therefore the actual voltage swing about the common-
mode voltage on each pin is
±
1.5V to achieve a total input range of
±
3.0V or 6Vp-p. (2) FSR is Full-Scale Range. (3) The output data is available at twice the symbol
rate with interpolated values. (4) With a pseudo-random equiprobable sequence of HDSL pulses; 13.5dBm applied to the transformer (16.5dBm output from txLINEP
and txLINEN). (5) See the Discussion of Specifications section of this data sheet for more information. (6) Guaranteed by design and characterization.
相關(guān)PDF資料
PDF描述
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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AFE1124E-1 制造商:Rochester Electronics LLC 功能描述:- Bulk
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