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參數資料
| 型號： | ADXRS300ABG-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調理 |
| 英文描述： | 【300∑/s Single Chip Yaw Rate Gyro with Signal Conditioning |
| 中文描述： | SPECIALTY ANALOG CIRCUIT, PBGA32 |
| 封裝： | 7 X 7 MM, 3 MM HEIGHT, BGA-32 |
| 文件頁數： | 5/8頁 |
| 文件大?。?/td> | 399K |
| 代理商： | ADXRS300ABG-REEL |
ADXRS300
THEORY OF OPERATION
The ADXRS300 operates on the principle of a resonator gyro.
Two polysilicon sensing structures each contain a dither frame,
which is electrostatically driven to resonance. This produces the
necessary velocity element to produce a Coriolis force during
angular rate. At two of the outer extremes of each frame,
orthogonal to the dither motion, are movable fingers that are
placed between fixed pickoff fingers to form a capacitive pickoff
structure that senses Coriolis motion. The resulting signal is fed
to a series of gain and demodulation stages that produce the
electrical rate signal output. The dual-sensor design rejects
external
g
-forces and vibration. Fabricating the sensor with the
signal conditioning electronics preserves signal integrity in
noisy environments.
Rev. A | Page 5 of 8
The electrostatic resonator requires 14 V to 16 V for operation.
Since only 5 V is typically available in most applications, a
charge pump is included on-chip. If an external 14 V to 16 V
supply is available, the two capacitors on CP1–CP4 can be omit-
ted and this supply can be connected to CP5 (Pin 7D) with a
100 nF decoupling capacitor in place of the 47 nF.
After the demodulation stage there is a single-pole low-pass
filter consisting of an internal 7 k resistor (R
SEN1
) and an
external user-supplied capacitor (CMID). A CMID capacitor of
100 nF sets a 400 Hz ±35% low-pass pole and is used to limit
high frequency artifacts before final amplification. Bandwidth
limit capacitor, C
OUT
, sets the pass bandwidth (see Figure 4 and
the Setting Bandwidth section).
AGND
TEMP
ST2
ST1
CP1
CP2
RATEOUT
CP4
PDD
CMID
SUMJ
2.5V
6A
5A
4A
3A
2A
1B
1C
1D
1E
1F
7B
7C
7D
7E
7F
6G
5G
4G
3G
2G
CP5
CP3
100nF
C
OUT
= 22nF
22nF
AVCC
100nF
100nF
PGND
22nF
47nF
5V
NOTE THAT INNER ROWS/COLUMNS OF PINS HAVE BEEN OMITTED
FOR CLARITY BUT SHOULD BE CONNECTED IN THE APPLICATION.
Figure 3. Example Application Circuit (Top View)
Supply and Common Considerations
Only power supplies used for supplying analog circuits are rec-
ommended for powering the ADXRS300. High frequency noise
and transients associated with digital circuit supplies may have
adverse effects on device operation.
Figure 3 shows the recommended connections for the
ADXRS300 where both AVCC and PDD have a separate
decoupling capacitor. These should be placed as close to the
their respective pins as possible before routing to the system
analog supply. This will minimize the noise injected by the
charge pump that uses the PDD supply.
It is also recommended to place the charge pump capacitors
connected to the CP1–CP4 pins as close to the part as possible.
These capacitors are used to produce the on-chip high voltage
supply switched at the dither frequency at approximately
14 kHz. Care should be taken to ensure that there is no more
than 50 pF of stray capacitance between CP1–CP4 and ground.
Surface-mount chip capacitors are suitable as long as they are
rated for over 15 V.
5V
+
-
SELF
TEST
AVCC
ST1
ST2
3A
5G
4G
ADXRS300
CP2
CP1
PDD
4A 5A
7E
6G
CHARGE
PUMP/REG.
12V
PTAT
7F
6A
7B 7C
CP4
CP3
CP5
7D
47nF
RATE
SENSOR
2G
1F
1D
SIGCORIOLIS
AGND
CMID
1C
SUMJ
RATE-
OUT
2.5V
1B
2A
1E
3G TEMP
R
OUT
180k
1%
RESONATOR LOOP
DEMOD
2.5V REF
≈
7k
±
35%
100nF
22nF
100nF
100nF
C
OUT
R
SEN1
R
SEN2
22nF
PGND
Figure 4. Block Diagram with External Components
Setting Bandwidth
External capacitors CMID and C
OUT
are used in combination
with on-chip resistors to create two low-pass filters to limit the
bandwidth of the ADXRS300’s rate response. The –3 dB fre-
quency set by
R
OUT
and
C
OUT
is
(
OUT
π
/
f
2
1
)
OUT
OUT
C
R
×
×
×
=
and can be well controlled since R
OUT
has been trimmed during
manufacturing to be 180 k ±1%. Any external resistor applied
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