
ADXL50
REV. B
–11–
As an example, if the desired span is
±
2.0 V for a =
±
50 g input,
then R3/R1 should be chosen such that
R
3
/R1 = V
OUT
Span/V
PR
Span
=
2.00/0.95 = 2.105 (1)
where V
PR
span is the output from the preamplifier and V
OUT
span is the buffer amplifier’s output, giving
R
3 = 2.105
×
R1
In noncritical applications, a resistor, R2, may simply be con-
nected between V
IN–
and common to provide an approximate
0 g offset level (see Figure 19). In this simplified configuration
R2 is found using:
R
2 = (1.8
V
×
R
3)/(
V
OUT
@ 0 g – 1.8
V
)
When used with a trim potentiometer, as in Figure 20, resistor
R2 sets the 0 g offset range and also sets the resolution of the
offset trim. A value of 100 k
is typical. Increasing R2 above
this value makes trimming the offset easier, but may not provide
enough trim range to set V
OUT
equal to +2.5 V for all devices.
T o provide an output span of
±
2.00 V, with a 0 g output of
+2.5 V, R1 could be set to the standard value of 49.9 k
and
from Equation 2, R3 = 105 k
.
For Figure 20, the circuit transfer function is:
(2)
V
OUT
=
R3
R1
(
1
.
8V
±
V
PR
)
R3
R2
(
1
.
8V
±
V
X
)
1
.
8V
T he summing amplifier configuration allows noninteractive
trimming of offset and span. Since V
PR
is not always exactly
1.8 V at 0 g, it will contribute to output offset. T herefore, span
must be trimmed first, followed by 0 g offset adjustment.
LOAD DRIVE CAPABILIT IE S OF T HE V
PR
AND BUFFE R
OUT PUT S
T he V
PR
and the buffer amplifier outputs are both capable of
driving a load to voltage levels approaching that of the supply
rail. However, both outputs are limited in how much current
they can supply, affecting component selection.
V
PR
Output
T he V
PR
pin has the ability to source current up to 500
μ
A but
only has a sinking capability of 30
μ
A which limits its ability to
drive loads. It is recommended that the buffer amplifier be used
in most applications, to avoid loading down V
PR
. In standard
±
50 g applications, the resistor R1 from V
PR
to V
IN–
is recom-
mended to have a value greater than 50 k
to reduce loading
effects.
Capacitive loading of the V
PR
pin should be minimized. A load
capacitance between the V
PR
pin and common will introduce an
offset of approximately 1 mV for every 10 pF of load. T he V
PR
pin may be used to directly drive an A/D input or other source
as long as these sensitivities are taken into account. It is always
preferable to drive A/D converters or other sources using the
buffer amplifier (or an external op amp) instead of the V
PR
pin.
Buffer Amplifier Output
T he buffer output can drive a load to within 0.25 V of either
power supply rail and is capable of driving 1000 pF capacitive
loads. Note that a capacitance connected across the buffer feed-
back resistor for low-pass filtering does not appear as a capaci-
tive load to the buffer. T he buffer amplifier is limited to
sourcing or sinking a maximum of 100
μ
A. Component values
for the resistor network should be selected to ensure that the
buffer amplifier can drive the filter under worst case transient
conditions.
SE LF-T E ST FUNCT ION
T he digital self-test input is compatible with both CMOS and
T T L signals. A Logic “l(fā)” applied to the self-test (ST ) input will
cause an electrostatic force to be applied to the sensor which
will cause it to deflect to the approximate negative full-scale out-
put of the device. Accordingly, a correctly functioning acceler-
ometer will respond by initiating an approximate –1 volt output
change at V
PR
. If the ADX L50 is experiencing an acceleration
when the self-test is initiated, the V
PR
output will equal the alge-
braic sum of the two inputs. T he output will stay at the self-test
level as long as the ST input remains high and will return to the
0 g level when the ST voltage is removed.
A self-test output that varies more than
±
10% from the nominal
–1.0 V change indicates a defective beam or a circuit problem
such as an open or shorted pin or component.
Operating the ADX L50’s buffer amplifier at Gains > 2, to pro-
vide full-scale outputs of less than
±
50 g, may cause the self-test
output to overdrive the buffer into saturation. T he self-test may
still be used in the case, but the change in the output must then
be monitored at the V
PR
pin instead of the buffer output.
Note that the value of the self-test delta is not an exact indica-
tion of the sensitivity (mV/g) of the ADX L50 and, therefore,
may not be used to calibrate the device for sensitivity error.
In critical applications, it may be desirable to monitor shifts in
the zero-g bias voltage from its initial value. A shift in the 0 g
bias level may indicate that the 0 g level has shifted which may
warrant an alarm.
POWE R SUPPLY DE COUPLING
T he ADX L50 power supply should be decoupled with a 0.1
μ
F
ceramic capacitor from +5 V pin of the ADX L50 to common
using very short component leads. For other decoupling consid-
erations, see EMI/RFI section.
OSCILLAT OR DE COUPLING CAPACIT OR, C2
An oscillator decoupling capacitor, C2, is used to remove
1 MHz switching transients in the sensor excitation signal, and
is required for proper operation of the ADX L50. A ceramic ca-
pacitor with a minimum value of 0.022
μ
F is recommended
from the oscillator decoupling capacitor pin to common. Small
amounts of capacitor leakage due to a dc resistance greater than
l M
will not affect operation (i.e., a high quality capacitor is
not needed here). As with the power supply bypass capacitor,
very short component leads are recommended. Although
0.022
μ
F is a good typical value, it may be increased for reasons
of convenience, but doing this will not improve the noise perfor-
mance of the ADX L50.