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參數(shù)資料
| 型號： | ADVFC32SH |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/6頁 |
| 文件大?。?/td> | 343K |
| 描述： | IC CONV V/F F/V MONO TO100-10 |
| 標準包裝： | 1 |
| 類型： | 電壓至頻率和頻率至電壓 |
| 頻率 - 最大： | 500kHz |
| 全量程： | ±150ppm/°C |
| 線性： | ±0.05% |
| 安裝類型： | 通孔 |
| 封裝/外殼： | TO-100-10 金屬罐 |
| 供應商設備封裝： | TO-100-10 |
| 包裝： | 散裝 |
REV. B
3
ADVFC32
UNIPOLAR V/F, POSITIVE INPUT VOLTAGE
When operated as a V/F converter, the transformation from
voltage to frequency is based on a comparison of input signal
magnitude to the 1 mA internal current source.
A more complete understanding of the ADVFC32 requires a
close examination of the internal circuitry of this part. Consider
the operation of the ADVFC32 when connected as shown in
Figure 1. At the start of a cycle, a current proportional to the
Figure 1. Connection Diagram for V/F Conversion,
Positive Input Voltage
input voltage flows through R3 and R1 to charge integration
capacitor C2. As charge builds up on C2, the output voltage of
the input amplifier decreases. When the amplifier output volt-
age (Pin 13) crosses ground (see Figure 2 at time t
1
), the
comparator triggers a one shot whose time period is determined
by capacitor C1. Specifically, the one shot time period (in nano-
seconds) is:
t
OS
E (C
l
+ 44 pF) ?6.7 k&
Figure 2. Voltage-to-Frequency Conversion Waveforms
During this period, a current of (1 mA I
IN
) flows out of the
integration capacitor. The total amount of charge depleted
during one cycle is, therefore (1 mA I
IN
) ?t
OS
. This charge is
replaced during the remainder of the cycle to return the integra-
tor to its original voltage. Since the charge taken out of C2 is
equal to the charge that is put on C2 every cycle,
(1 mA I
IN
) ?/SPAN> t
OS
= I
IN
?/SPAN>
1
F
OUT
t
OS
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
or, rearranging terms,
F
OUT
=
I
IN
1mA?SPAN class="pst ADVFC32SH_2632837_9">t
OS
The complete transfer equation can now be derived by substi-
tuting I
IN
= V
IN
/R
IN
and the equation relating C1 and t
OS
. The
final equation describing ADVFC32 operation is:
V
II
N
/R
IN
1mA?SPAN class="pst ADVFC32SH_2632837_9"> C
1
+44pF
(
)
?.7k&
Components should be selected to optimize performance over
the desired input voltage and output frequency range using the
equations listed below:
3.7?0
7
pF/sec
F
OUTFS
44pF
C
2
=
10
4
Farads/sec
F
OUT FS
1000pFminimum
(
)
R
IN
=
V
IN FS
0.25mA
R
2
e
+V
LOGIC
8mA
Both R
IN
and C
1
should have very low temperature coefficients
as changes in their values will result in a proportionate change
in the V/F transfer function. Other component values and tem-
perature coefficients are not critical.
Table I. Suggested Values for C
1
, R
IN
and C
2
V
IN FS
F
OUT FS
C
1
R
IN
C
2
1 V 10 kHz
3650 pF 4.0 k& 0.01 礔
10 V 10 kHz
3650 pF 40 k& 0.01 礔
1 V 100 kHz 330 pF 4.0 k& 1000 pF
10 V 100 kHz 330 pF 40 k& 1000 pF
ORDERING GUIDE
Part
Gain Tempco Temp Range Package
Number
1
ppm/C
C
Option
ADVFC32KN ?5 typ
0 to 70
14-Pin
Plastic DIP
ADVFC32BH ?00 max
25 to +85 TO-100
ADVFC32SH ?50 max
55 to +125 TO-100
NOTE
1
For details on grade and package offerings screened in accordance with MIL-STD-883,
refer to the Analog Devices Military Products Databook or current ADVFC32/883B
data sheet.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection. Although
the ADVFC32 features proprietary ESD protection circuitry, permanent damage may occur on
devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are
recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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