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參數(shù)資料
| 型號： | ADV7403KSTZ-1402 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 12-Bit, Integrated, Multiformat SDTV/HDTV Video Decoder and RGB Graphics Digitizer |
| 中文描述： | 12位，綜合，多格式標清/高清視頻解碼器和RGB圖形數(shù)字化儀 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 259K |
| 代理商： | ADV7403KSTZ-1402 |
ADV7403
Rev. SpA | Page 5 of 24
4
All ADC linearity tests performed at input range of full scale 12.5%, and at zero scale + 12.5%.
5
Max INL and DNL specifications obtained with part configured for component video input.
6
Specification for ADV7403KSTZ-140 only.
7
To obtain specified V
IH
level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
IH
on Pin 38 = 1.2 V.
8
To obtain specified V
IL
level on Pin 38, Register 0x13 (wo) must be programmed with value 0x04. If Register 0x13 is programmed with value 0x00,
then V
IL
on Pin 38 = 0.4 V.
9
Pins 1, 2, 13, 14, 16, 19, 24, 29, 30, 31, 32, 33, 34, 35, 45, 78, 79, 83, 84, 87, 88, 95, 96, 97, 100.
10
Guaranteed by characterization.
11
V
OH
and V
OL
levels obtained using default drive strength value (0xD5) in Register Subaddress 0xF4.
12
Pins 3, 13, 14, 19, 24, 29, 30, 31, 32, 33, 34, 45.
13
Analog current measurements for CVBS made with ADC0 powered up only, For RGB, ADC0, ADC1, and ADC2 powered up only, for SCART FB, all ADCs powered up.
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