參數(shù)資料
型號： ADV7343BSTZ
廠商： Analog Devices Inc
文件頁數(shù)： 105/108頁
文件大?。?/td> 0K
描述： IC ENCODER VIDEO W/DAC 64-LQFP
產(chǎn)品變化通告： ADV734x, ADV739x Feature Improvement
標(biāo)準(zhǔn)包裝： 1
類型： 視頻編碼器
應(yīng)用： DVD，Blu-Ray
電壓 - 電源，模擬： 3.3V
電壓 - 電源，數(shù)字： 1.8V
安裝類型： 表面貼裝
封裝/外殼： 64-LQFP
供應(yīng)商設(shè)備封裝： 64-LQFP（10x10）
包裝： 托盤
ADV7342/ADV7343
Data Sheet
Rev. | Page 96 of 108
Table 72. 24-Bit 525i RGB In, RGB and CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0xFC
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xC9
Pixel data valid. RGB and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled. Pedestal
enabled.
0x87
0x80
RGB input enabled.
0x88
0x10
24-bit RGB input enabled
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 73. 8-Bit NTSC Square Pixel YCrCb In (EAV/SAV),
CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xDB
Pixel data valid. CVBS/Y-C (S-Video)
out. SSAF PrPb filter enabled. Active
video edge control enabled. Pedestal
enabled. Square pixel mode enabled.
0x8C
0x55
Subcarrier frequency register values
for CVBS and/or S-Video (Y-C) output
in NTSC square pixel mode (24.5454
MHz input clock).
0x8D
0x55
0x8E
0x55
0x8F
0x25
Table 74. 16-Bit NTSC Square Pixel RGB In, CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0x1C
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x10
NTSC standard. SSAF luma filter
enabled. 1.3 MHz chroma filter enabled.
0x82
0xDB
Pixel data valid. CVBS/Y-C (S-Video) out.
SSAF PrPb filter enabled. Active video
edge control enabled. Pedestal
enabled. Square pixel mode enabled.
0x87
0x80
RGB input enabled.
0x88
0x10
16-bit RGB input enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
0x8C
0x55
Subcarrier frequency register values for
CVBS and/or S-Video (Y-C) output in
NTSC square pixel mode (24.5454 MHz
input clock).
0x8D
0x55
0x8E
0x55
0x8F
0x25
Table 75. 8-Bit 625i YCrCb In (EAV/SAV), YPrPb and
CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0xFC
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
Table 76. 8-Bit 625i YCrCb In, YPrPb and CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0xFC
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. YPrPb and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
Table 77. 8-Bit 625i YCrCb In (EAV/SAV), RGB and
CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0xFC
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
Table 78. 8-Bit 625i YCrCb In, RGB and CVBS/Y-C Out
Subaddress
Setting
Description
0x17
0x02
Software reset.
0x00
0xFC
All DACs enabled. PLL enabled (16×).
0x01
0x00
SD input mode.
0x02
0x10
RGB output enabled. RGB output sync
enabled.
0x80
0x11
PAL standard. SSAF luma filter enabled.
1.3 MHz chroma filter enabled.
0x82
0xC1
Pixel data valid. RGB and CVBS/Y-C
out. SSAF PrPb filter enabled. Active
video edge control enabled.
0x8A
0x0C
Timing Mode 2 (slave). HSYNC/VSYNC
synchronization.
D
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