參數(shù)資料
型號: ADV7314
廠商: Analog Devices, Inc.
英文描述: Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs
中文描述: 多格式視頻編碼器216兆赫六噪聲整形的14位DAC
文件頁數(shù): 65/84頁
文件大?。?/td> 1069K
代理商: ADV7314
REV. 0
ADV7314
–65–
CH2 200mV
M 4.0 s
T
CH2 EVEN
1.82872ms
2
T
Figure 73. 525p Field Pattern
CH2 200mV
M 4.0 s
T
CH2 EVEN
1.84176ms
2
T
Figure 74. 525p Black Bar (–35 mV, 0 mV, 7 mV,
14 mV, 21 mV, 28 mV, 35 mV)
CH2 100mV
M 4.0 s
T
CH2 EVEN
1.82936ms
2
T
Figure 75. 625p Field Pattern
CH2 100mV
M 4.0 s
T
CH2 EVEN
1.84176ms
2
T
Figure 76. 625p Black Bar (–35 mV, 0 mV, 7 mV,
14 mV, 21 mV, 28 mV, 35 mV)
The following register settings are used to generate an SD NTSC
CVBS output on DAC A.
Register
Setting
Subaddress
00h
40h
42h
44h
4Ah
80h
10h
40h
40h
08h
*
All other registers are set to default/normal settings.
For PAL CVBS output on DAC A, the same settings are used
except that Subaddress 40h is changed to 11h.
The following register settings are used to generate an SD NTSC
black bar pattern output on DAC A.
Register
Setting
Subaddress
00h
02h
40h
42h
44h
4Ah
80h
04h
10h
40h
40h
08h
*
All other registers are set to default/normal settings.
For PAL black bar pattern output on DAC A, the same settings
are used except that subaddress = 40h and register setting = 11h.
The following register settings are used to generate a 525p hatch
pattern on DAC D.
Register
Subaddress
Setting
00h
01h
10h
11h
16h
17h
18h
80h
10h
40h
05h
A0h
80h
80h
*
All other registers are set to default/normal settings.
For 625p hatch pattern on DAC D, the same register settings
are used except that subaddress = 10h and register setting = 50h.
For a 525p black bar pattern output on DAC D, the same settings
are used as for a 525p hatch pattern except that subaddress = 02h
and register setting = 24h.
For 625p black bar pattern output on DAC D, the same settings
are used as for a 625p hatch pattern except that subaddress = 02h
and register setting = 24h; and subaddress = 10h and register
setting = 50h.
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