- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374047 > ADV7312 (Analog Devices, Inc.) Multiformat 11-Bit HDTV Video Encoder PDF資料下載
參數(shù)資料
| 型號： | ADV7312 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat 11-Bit HDTV Video Encoder |
| 中文描述： | 多格式11位高清晰度電視視頻編碼器 |
| 文件頁數(shù)： | 57/84頁 |
| 文件大?。?/td> | 975K |
| 代理商： | ADV7312 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁當(dāng)前第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
REV. 0
ADV7312
–57–
PCB Board Layout Considerations
The ADV7312 are optimally designed for lowest noise perfor-
mance, both radiated and conducted noise. To complement the
excellent noise performance of the ADV7312, it is imperative
that great care be given to the PC board layout.
The layout should be optimized for lowest noise on the ADV7312
power and ground lines. This can be achieved by shielding
the digital inputs and providing good decoupling. The lead
length between groups of V
AA
and AGND, V
DD
and DGND,
and V
DD_IO
and GND_IO pins should be kept as short as pos-
sible to minimized inductive ringing.
It is recommended that a 4-layer printed circuit board is used,
with power and ground planes separating the layer of the signal
carrying traces of the components and solder side layer. Com-
ponent placement should be carefully considered in order to
separate noisy circuits, such as crystal clocks, high speed logic
circuitry, and analog circuitry.
There should be a separate analog ground plane and a separate
digital ground plane.
Power planes should encompass a digital power plane and an
analog power plane. The analog power plane should contain the
DACs and all associated circuitry, V
REF
circuitry. The digital
power plane should contain all logic circuitry.
The analog and digital power planes should be individually
connected to the common power plane at a single point through
a suitable filtering device, such as a ferrite bead.
DAC output traces on a PCB should be treated as transmission
lines. It is recommended that the DACs be placed as close as
possible to the output connector, with the analog output traces
being as short as possible (less than 3 inches). The DAC termina-
tion resistors should be placed as close as possible to the DAC
outputs and should overlay the PCB’s ground plane. As well as
minimizing reflections, short analog output traces will reduce
noise pickup due to neighboring digital circuitry.
To avoid crosstalk between the DAC outputs, it is recommended
that as much space as possible be left between the tracks of the
individual DAC output pins. The addition of ground tracks
between outputs is also recommended.
Supply Decoupling
Noise on the analog power plane can be further reduced by the
use of decoupling capacitors.
Optimum performance is achieved by the use of 10 nF and
0.1
μ
F ceramic capacitors. Each group of V
AA
, V
DD
, or V
DD_IO
pins should be individually decoupled to ground. This should
be done by placing the capacitors as close as possible to the
device with the capacitor leads as short as possible, thus mini-
mizing lead inductance.
A 1
μ
F tantalum capacitor is recommended across the V
AA
supply in addition to 10 nF ceramic.
See the circuit layout in Figure 60.
Digital Signal Interconnect
The digital signal lines should be isolated as much as possible
from the analog outputs and other analog circuitry. Digital
signal lines should not overlay the analog power plane.
Due to the high clock rates used, long clock lines to the
ADV7312 should be avoided to minimize noise pickup.
Any active pull-up termination resistors for the digital inputs
should be connected to the digital power plane and not the
analog power plane.
Analog Signal Interconnect
The ADV7312 should be located as close as possible to the
output connectors, thus minimizing noise pickup and reflec-
tions due to impedance mismatch.
For optimum performance, the analog outputs should each
be source and load terminated, as shown in Figure 60. The
termination resistors should be as close as possible to the
ADV7312 to minimize reflections.
For optimum performance, it is recommended that all decoupling
and external components relating to the ADV7312 be located
on the same side of the PCB and as close as possible to the
ADV7312.
Any unused inputs should be tied to ground.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7312KST | Multiformat 11-Bit HDTV Video Encoder |
| ADV7320KSTZ | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7320 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7321 | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
| ADV7321KSTZ | Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7312KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 11-Bit HDTV Video Encoder |
| ADV7314 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs |
| ADV7314KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat 216 MHz Video Encoder with Six NSV 14-Bit DACs |
| ADV73186702 | 制造商:LG Corporation 功能描述:FRAME ASSEMBLY,DOOR |
| ADV73186703 | 制造商:LG Corporation 功能描述:FRAME ASSEMBLY,DOOR |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。