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參數(shù)資料
| 型號： | ADV7196 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| 中文描述： | 多格式逐行掃描/高清晰度電視編碼器三種11位DAC，10位數(shù)據(jù)輸入，以及Macrovision |
| 文件頁數(shù)： | 18/36頁 |
| 文件大?。?/td> | 501K |
| 代理商： | ADV7196 |
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REV. 0
ADV7196A
–18–
MODE REGISTER 4
MR4 (MR47–MR40)
(Address (SR4–SR0) = 04H)
Figure 24 shows the various operations under the control of Mode
Register 4.
MR4 BIT DESCRIPTION
Timing Reset (MR40)
Toggling MR40 from low to high and low again resets the inter-
nal horizontal and vertical timing counters.
MODE REGISTER 5
MR5 (MR57–MR50)
(Address (SR4–SR0) = 05H)
Figure 25 shows the various operations under the control of
Mode Register 5.
MR5 BIT DESCRIPTION
Reserved (MR50)
This bit is reserved for the revision code
.
RGB Mode (MR51)
When RGB mode is enabled (MR51 = “1”) the ADV7196A accepts
unsigned binary RGB data at its input port. This control is also
available in Async Timing Mode
.
Sync on PrPb (MR52)
By default the color component output signals Pr, Pb do not
contain any horizontal sync pulses. They can be inserted when
MR52 = “1.” This facility is only available when Output Standard
Selection has been set to EIA-770.2 (MR01–00 = “00”) or Full
Input Range (MR01–00 = “10”).
This control is not available in RGB mode
.
MODE REGISTER 3
MR3 (MR37–MR30)
(Address (SR4–SR0) = 03H)
Figure 23 shows the various operations under the control of Mode
Register 3.
MR3 BIT DESCRIPTION
HDTV Enable (MR30)
When this bit is set to “1” the ADV7196A reverts to HDTV mode
(refer to HDTV mode section). When set to “0” the ADV7196A
is set up in Progressive Scan Mode (PS Mode)
.
Reserved (MR31–MR32)
A “0” must be written to these bits
.
DAC A Control (MR33)
Setting this bit to “1” enables DAC A, otherwise this DAC is
powered down
.
DAC B Control (MR34)
Setting this bit to “1” enables DAC B, otherwise this DAC is
powered down
.
DAC C Control (MR35)
Setting this bit to “1” enables DAC C, otherwise this DAC is
powered down
.
Interpolation (MR36)
This bit enables the second stage interpolation filters. When this
bit is enabled (MR36 = “1”). data is send at 54 MHz to the DAC
output stage. After Reset it is recommended to toggle this bit.
Before toggling this bit 3Ehex must be written to address 09hex
to guarantee correct operations
.
Reserved (MR37)
A zero must be written to this bit
.
MR37
MR32
MR34
MR36
ZERO MUST BE
WRITTEN TO
THIS BIT
MR37
MR34
0
1
POWER-DOWN
NORMAL
DAC B CONTROL
MR35
MR36
0
1
DISABLE
ENABLE
INTERPOLATION
MR35
0
1
POWER-DOWN
NORMAL
DAC C CONTROL
MR33
ZERO MUST BE
WRITTEN TO
THIS BIT
MR32
MR31
MR30
0
1
DISABLE
ENABLE
HDTV ENABLE
MR30
MR33
0
1
POWER-DOWN
NORMAL
DAC A CONTROL
ZERO MUST BE
WRITTEN TO
THIS BIT
MR31
Figure 23. Mode Register 3
MR47
MR42
MR44
MR46
ZERO MUST BE
WRITTEN TO
THESE REGISTERS
MR47
–
MR41
MR45
MR43
MR41
MR40
MR40
TIMING RESET
Figure 24. Model Register 4
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7196A | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196AKS | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KST | Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7304A | Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV 14-Bit DACs |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7196A | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7196AKS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KS | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI-FORMAT HDTV ENCODER, 3 11-BIT DACS - Bulk |
| ADV7197KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat HDTV Encoder with Three 11-Bit DACs |
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