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參數(shù)資料
| 型號： | ADV7177 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| 中文描述： | 綜合數(shù)字無線電咨詢委員會，601到PAL / NTSC制式視頻編碼器 |
| 文件頁數(shù)： | 22/38頁 |
| 文件大?。?/td> | 280K |
| 代理商： | ADV7177 |
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ADV7177/ADV7178
–22–
REV. 0
The ADV7177/ADV7178 acts as a standard slave device on the
bus. The data on the SDATA pin is 8 bits long, supporting
the 7-bit addresses, plus the R/
W
bit. The ADV7178 has 36
subaddresses and the ADV7177 has 31 subaddresses to enable
access to the internal registers. It therefore interprets the first
byte as the device address and the second byte as the starting
subaddress. The subaddresses auto increment allows data to
be written to or read from the starting subaddress. A data
transfer is always terminated by a stop condition. The user can
also access any unique subaddress register on a one-by-one basis
without having to update all the registers. There is one excep-
tion. The subcarrier frequency registers should be updated in
sequence, starting with Subcarrier Frequency Register 0. The
auto increment function should then be used to increment and
access Subcarrier Frequency Registers 1, 2 and 3. The subcarrier
frequency registers should not be accessed independently.
Stop and start conditions can be detected at any stage during
the data transfer. If these conditions are asserted out of sequence
with normal read and write operations, they cause an immediate
jump to the idle condition. During a given SCLOCK high pe-
riod, the user should issue only one start condition, one stop
condition or a single stop condition followed by a single start
condition. If an invalid subaddress is issued by the user, the
ADV7177/ADV7178 will not issue an acknowledge and will
return to the idle condition. If, in auto-increment mode, the
user exceeds the highest subaddress, the following action will be
taken:
1. In Read Mode, the highest subaddress register contents will
continue to be output until the master device issues a no-
acknowledge. This indicates the end of a read. A no-
acknowledge condition is where the SDATA line is not
pulled low on the ninth pulse.
2. In Write Mode, the data for the invalid byte will not be
loaded into any subaddress register, a no-acknowledge will
be issued by the ADV7177/ADV7178 and the part will re-
turn to the idle condition.
Figure 29 illustrates an example of data transfer for a read se-
quence and the start and stop conditions.
1-7
8
9
1-7
8
9
1-7
8
9
P
S
START ADDR R/
W
ACK SUBADDRESS ACK
DATA
ACK
STOP
SDATA
SCLOCK
Figure 29. Bus Data Transfer
Figure 30 shows bus write and read sequences.
REGISTER ACCESSES
The MPU can write to or read from all of the ADV7177/
ADV7178 registers except the subaddress register, which is a
write-only register. The subaddress register determines which
register the next read or write operation accesses. All communi-
cations with the part through the bus start with an access to the
subaddress register. A read/write operation is performed from/to
the target address, which then increments to the next address
until a stop command on the bus is performed.
REGISTER PROGRAMMING
The following section describes each register, including subaddress
register, mode registers, subcarrier frequency registers, subcarrier
phase register, timing registers, closed captioning extended data
registers, closed captioning data registers and NTSC pedestal
control registers in terms of its configuration.
DATA
A(S)
S
SLAVE ADDR A(S)
SUB ADDR
A(S)
LSB = 0
LSB = 1
DATA
A(S) P
S
SLAVE ADDR A(S)
SUB ADDR
A(S) S
SLAVE ADDR
A(S)
DATA
A(M)
A
(M)
DATA
P
WRITE
SEQUENCE
READ
SEQUENCE
A
(S) = NO-ACKNOWLEDGE BY SLAVE
A
(M) = NO-ACKNOWLEDGE BY MASTER
A(S) = ACKNOWLEDGE BY SLAVE
A(M) = ACKNOWLEDGE BY MASTER
S = START BIT
P = STOP BIT
Figure 30. Write and Read Sequences
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7178 | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7178KS | Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
| ADV7180 | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| ADV7180BCPZ | 10-Bit, 4 x Oversampling SDTV Video Decoder |
| ADV7180BSTZ | 10-Bit, 4 x Oversampling SDTV Video Decoder |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7177KS | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 9-Bit 44-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:NTSC/PAL 3 DAC VIDEO ENCODER I.C. - Bulk 制造商:Analog Devices 功能描述:IC VIDEO ENCODER |
| ADV7177KS-REEL | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 9-Bit 44-Pin MQFP T/R 制造商:Rochester Electronics LLC 功能描述:NTSC/PAL 3 DAC VIDEO ENCODER I.C. - Tape and Reel |
| ADV7177KSZ | 功能描述:IC DAC VIDEO NTSC 3-CH 44MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7177KSZ-REEL | 功能描述:IC DAC VIDEO NTSC 3-CH 44MQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 編碼器，解碼器，轉(zhuǎn)換器 系列:- 產(chǎn)品變化通告:Development Systems Discontinuation 26/Apr/2011 標(biāo)準(zhǔn)包裝:1 系列:- 類型:編碼器 應(yīng)用:DVB-S.2 系統(tǒng) 電壓 - 電源，模擬:- 電壓 - 電源，數(shù)字:- 安裝類型:- 封裝/外殼:模塊 供應(yīng)商設(shè)備封裝:模塊 包裝:散裝 其它名稱:Q4645799 |
| ADV7178 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Integrated Digital CCIR-601 to PAL/NTSC Video Encoder |
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