參數(shù)資料
型號(hào): ADV7171KSUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 1/64頁(yè)
文件大?。?/td> 0K
描述: IC DAC VIDEO ENC NTSC 44TQFP
產(chǎn)品培訓(xùn)模塊: Interfacing AV Converters to Blackfin Processors
標(biāo)準(zhǔn)包裝: 1
類型: 視頻編碼器
應(yīng)用: 機(jī)頂盒,視頻播放器
電壓 - 電源,模擬: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 44-TQFP
供應(yīng)商設(shè)備封裝: 44-TQFP(10x10)
包裝: 托盤
產(chǎn)品目錄頁(yè)面: 786 (CN2011-ZH PDF)
Digital PAL/NTSC Video Encoder with 10-Bit
SSAF and Advanced Power Management
ADV7170/ADV7171
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 2002–2009 Analog Devices, Inc. All rights reserved.
FEATURES
ITU-R1 BT601/656 YCrCb to PAL/NTSC video encoder
High quality 10-bit video DACs
SSAF (super sub-alias filter)
Advanced power management features
CGMS (copy generation management system)
WSS (wide screen signalling)
Simultaneous Y, U, V, C output format
NTSC M, PAL M/N2, PAL B/D/G/H/I, PAL60
Single 27 MHz clock required (×2 oversampling)
80 dB video SNR
32-bit direct digital synthesizer for color subcarrier
Multistandard video output support
Composite (CVBS)
Components S-Video (Y/C), YUV, and RGB
EuroSCART output (RGB + CVBS/LUMA)
Component YUV + CHROMA
Video input data port supports
CCIR-656 4:2:2 8-bit parallel input format
4:2:2 16-bit parallel input format
Programmable simultaneous composite and S-Video or RGB
(SCART)/YUV video outputs
Programmable luma filters (low-pass [PAL/NTSC]) notch,
extended (SSAF, CIF, and QCIF)
Programmable chroma filters (low-pass [0.65 MHz, 1.0 MHz,
1.2 MHz and 2.0 MHz], CIF and QCIF)
Programmable VBI (vertical blanking interval)
Programmable subcarrier frequency and phase
Programmable LUMA delay
Individual on/off control of each DAC
CCIR and square pixel operation
Integrated subcarrier locking to external video source
Color signal control/burst signal control
Interlaced/noninterlaced operation
Complete on-chip video timing generator
Programmable multimode master/slave operation
Macrovision AntiTaping Rev. 7.1 (ADV7170 only)3
Closed captioning support
Teletext insertion port (PAL-WST)
On-board color bar generation
On-board voltage reference
2-wire serial MPU interface (I2C-compatible and Fast I2C)
Single supply 5 V or 3.3 V operation
Small 44-lead MQFP/TQFP packages
Industrial temperature grade = 40°C to +85°C4
APPLICATIONS
High performance DVD playback systems, portable video
equipment including digital still cameras and laptop PCs,
video games, PC video/multimedia and digital
satellite/cable systems (set-top boxes/IRD)
1 ITU-R and CCIR are used interchangeably in this document (ITU-R has replaced
CCIR recommendations).
2 Throughout the document N is referenced to PAL- Combination -N.
3 Protected by U.S. Patents 4,631,603;, 4,577,216, 4,819,098; and other intellectual
property rights. The Macrovision anticopy process is licensed for noncommercial
home use only, which is its sole intended use in the device. Please contact sales
office for latest Macrovision version available.
4 Refer to Table 8 for complete operating details.
10-BIT
DAC
10
10-BIT
DAC
10
10-BIT
DAC
10
10-BIT
DAC
10
M
U
L
T
I
P
L
E
X
E
R
DAC D (PIN 27)
DAC C (PIN 26)
DAC B (PIN 31)
DAC A (PIN 32)
VREF
RSET
COMP
VOLTAGE
REFERENCE
CIRCUIT
ADV7170/ADV7171
GND
SCRESET/RTC
ALSB
TTXREQ
TTX
SDATA
SCLOCK
CLOCK
REAL-TIME
CONTROL
CIRCUIT
I2C MPU PORT
VIDEO TIMING
GENERATOR
4:2:2 TO
4:4:4
INTER-
POLATOR
8
V
8
U
8
Y
8
9
8
9
YCrCb
TO
YUV
MATRIX
ADD
BURST
ADD
SYNC
POWER
MANAGEMENT
CONTROL
(SLEEP MODE)
VAA
RESET
COLOR
DATA
P7–P0
P15–P8
HSYNC
BLANK
FIELD/VSYNC
INTER-
POLATOR
INTER-
POLATOR
PROGRAMMABLE
LUMINANCE
FILTER
PROGRAMMABLE
CHROMINANCE
FILTER
CGMS AND WSS
INSERTION
BLOCK
TELETEXT
INSERTION
BLOCK
10
U
V
10
SIN/COS
DDS BLOCK
YUV TO
RGB
MATRIX
00221-
001
Figure 1. Functional Block Diagram
Protected by U.S. Patents 5,343,196; 5,442,355; and other intellectual property rights.
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