參數(shù)資料
型號(hào): ADUM7234BRZ
廠商: ANALOG DEVICES INC
元件分類: 外設(shè)及接口
英文描述: Isolated Precision Half-Bridge Driver, 4 A Output, 16 Pin SOIC, Ind Temp
中文描述: 4 A HALF BRIDGE BASED PRPHL DRVR, PDSO16
封裝: ROHS COMPLIANT, MS-012AC, SOIC-16
文件頁(yè)數(shù): 6/12頁(yè)
文件大小: 266K
代理商: ADUM7234BRZ
ADuM7234
Rev. A | Page 3 of 12
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12 V ≤ VDDA ≤ 18 V, 12 V ≤ VDDB ≤ 18 V. All minimum/maximum
specifications apply over the entire recommended operating range, unless otherwise noted. All typical specifications are at TA = 25°C,
VDD1 = 5 V, VDDA = 15 V, VDDB = 15 V.
Table 1.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Input Supply Current, Quiescent
IDDI(Q)
1.0
2.2
mA
Output Supply Current A or Output Supply
Current B, Quiescent
IDDA(Q), IDDB(Q)
1.5
3.2
mA
Input Supply Current, 2 Mbps
IDDI(2)
1.4
3.0
mA
Output Supply Current A or Output Supply
Current B, 2 Mbps
IDDA(2), IDDB(2)
22
30
mA
CL = 1000 pF
Input Currents
IIA, IIB, IDISABLE
10
+0.01
+10
μA
0 ≤ VIA, VIB, VDISABLE ≤ VDD1
Logic High Input Threshold
VIH
0.7 × VDD1
V
Logic Low Input Threshold
VIL
0.3×VDD1
V
Logic High Output Voltages
VOAH,VOBH
VDDA 0.15,
VDDB 0.15
VDDA, VDDB
V
IOA, IOB = 20 mA
Logic Low Output Voltages
VOAL,VOBL
0.15
V
IOA, IOB = 20 mA
Undervoltage Lockout, VDDA or VDDB Supply
Positive-Going Threshold
VDDBUV+
8.0
8.9
9.8
Negative-Going Threshold
VDDBUV-
7.4
8.2
9.0
Hysteresis
VDDBUVH
0.3
0.7
Output Short-Circuit Pulsed Current1
IOA(SC), IOB(SC)
2.0
4.0
A
SWITCHING SPECIFICATIONS
Minimum Pulse Width2
PW
100
ns
CL = 1000 pF
Maximum Switching Frequency3
2
Mbps
CL = 1000 pF
Propagation Delay4
tPHL, tPLH
130
160
200
ns
CL = 1000 pF
Change vs. Temperature
130
ps/°C
CL = 1000 pF
Pulse Width Distortion, |tPLH tPHL|
PWD
14
ns
CL = 1000 pF
Channel-to-Channel Matching,
Rising or Falling Edges5
11
ns
CL = 1000 pF
Channel-to-Channel Matching,
Rising vs. Falling Edges6
25
ns
CL = 1000 pF
Part-to-Part Matching, Rising or Falling Edges7
55
ns
CL = 1000 pF, input tr = 3 ns
Part-to-Part Matching, Rising vs. Falling Edges8
63
ns
CL = 1000 pF, input tr = 3 ns
Output Rise/Fall Time (10% to 90%)
tR/tF
8
14
30
ns
CL = 1000 pF
1 Short-circuit duration less than 1 second. Average power must conform to the limit shown under the
.
Absolute Maximum Ratings
2 The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3 The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 Channel-to-channel matching, rising, or falling edges, is the magnitude of the propagation delay difference between two channels of the same part when the inputs
are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6 Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between two channels of the same part when one input is
a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7 Part-to-part matching, rising or falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8 Part-to-part matching, rising vs. falling edges, is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
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