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參數(shù)資料
| 型號： | ADUM6404ARWZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 模擬信號調(diào)理 |
| 英文描述： | SPECIALTY ANALOG CIRCUIT, PDSO16 |
| 封裝： | ROHS COMPLIANT, MS-013AA, SOIC-16 |
| 文件頁數(shù)： | 13/24頁 |
| 文件大?。?/td> | 440K |
| 代理商： | ADUM6404ARWZ |
ADuM6400/ADuM6401/ADuM6402/ADuM6403/ADuM6404
Rev. 0 | Page 20 of 24
PROPAGATION DELAY-RELATED PARAMETERS
Propagation delay is a parameter that describes the time it takes
a logic signal to propagate through a component (see Figure 26).
The propagation delay to a logic low output may differ from the
propagation delay to a logic high.
INPUT (VIx)
OUTPUT (VOx)
tPLH
tPHL
50%
081
41
-02
6
Figure 26. Propagation Delay Parameters
Pulse width distortion is the maximum difference between these
two propagation delay values and is an indication of how
accurately the input signal timing is preserved.
Channel-to-channel matching refers to the maximum amount
the propagation delay differs between channels within a single
ADuM640x component.
Propagation delay skew refers to the maximum amount the
propagation delay differs between multiple ADuM640x
components operating under the same conditions.
EMI CONSIDERATIONS
The dc-to-dc converter section of the ADuM640x components
must, of necessity, operate at a very high frequency to allow
efficient power transfer through the small transformers.
This creates high frequency currents that can propagate in
circuit board ground and power planes, causing edge and
dipole radiation. Grounded enclosures are recommended for
applications that use these devices. If grounded enclosures are
not possible, follow good RF design practices in layout of the
PCB. See www.analog.com for the most current PCB layout
recommendations specifically for the ADuM640x.
DC CORRECTNESS AND MAGNETIC FIELD IMMUNITY
Positive and negative logic transitions at the isolator input cause
narrow (~1 ns) pulses to be sent to the decoder via the transformer.
The decoder is bistable and is, therefore, either set or reset by
the pulses, indicating input logic transitions. In the absence of
logic transitions at the input for more than 1 μs, periodic sets of
refresh pulses indicative of the correct input state are sent to
ensure dc correctness at the output. If the decoder receives no
internal pulses of more than approximately 5 μs, the input side
is assumed to be unpowered or nonfunctional, in which case,
the isolator output is forced to a default high state by the watchdog
timer circuit. This situation should only occur in the ADuM640x
devices during power-up and power-down operations.
The limitation on the ADuM640x magnetic field immunity is
set by the condition in which induced voltage in the transformer
receiving coil is sufficiently large to either falsely set or reset the
decoder. The following analysis defines the conditions under
which this can occur. The 3.3 V operating condition of the
ADuM640x is examined because it represents the most susceptible
mode of operation.
The pulses at the transformer output have an amplitude of >1.0 V.
The decoder has a sensing threshold of about 0.5 V, thus estab-
lishing a 0.5 V margin in which induced voltages can be tolerated.
The voltage induced across the receiving coil is given by
V = (dβ/dt)
∑πrn2; n = 1, 2, … , N
where:
β is the magnetic flux density (gauss).
N is the number of turns in the receiving coil.
rn is the radius of the nth turn in the receiving coil (cm).
Given the geometry of the receiving coil in the ADuM640x, and
an imposed requirement that the induced voltage be, at most, 50%
of the 0.5 V margin at the decoder, a maximum allowable
magnetic field is calculated as shown in Figure 27.
MAGNETIC FIELD FREQUENCY (Hz)
100
MA
XIMU
M
A
L
O
W
A
B
L
E
MA
G
N
ET
IC
FL
U
X
D
E
N
S
IT
Y
(k
ga
us
s
)
0.001
1M
10
0.01
1k
10k
10M
0.1
1
100M
100k
0
814
1-
0
27
Figure 27. Maximum Allowable External Magnetic Flux Density
For example, at a magnetic field frequency of 1 MHz, the
maximum allowable magnetic field of 0.2 kgauss induces a
voltage of 0.25 V at the receiving coil. This is about 50% of the
sensing threshold and does not cause a faulty output transition.
Similarly, if such an event occurs during a transmitted pulse
(and is of the worst-case polarity), it reduces the received pulse
from >1.0 V to 0.75 V, which is still well above the 0.5 V sensing
threshold of the decoder.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
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| ADUM6404CRIZ | 功能描述:隔離器接口集成電路 8mm creepage 4-Ch 5kV Dig Iso Int DC/DC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 傳播延遲時間: 電源電壓-最大:5.5 V 電源電壓-最小:3 V 電源電流:3.6 mA 功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:SOIC-8 封裝:Tube |
| ADUM6404CRIZ-RL | 功能描述:隔離器接口集成電路 8mm creepage 4-Ch 5kV Dig Iso Int DC/DC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 傳播延遲時間: 電源電壓-最大:5.5 V 電源電壓-最小:3 V 電源電流:3.6 mA 功率耗散: 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:SOIC-8 封裝:Tube |
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