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參數(shù)資料
| 型號： | ADT7408CCPZ2-REEL7 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | DIGITAL TEMP SENSOR-SERIAL, 12BIT(s), 4Cel, SQUARE, SURFACE MOUNT |
| 封裝： | 3 X 3 MM, MO-229VEED-4, LFCSP-8 |
| 文件頁數(shù)： | 2/22頁 |
| 文件大?。?/td> | 570K |
| 代理商： | ADT7408CCPZ2-REEL7 |
ADT7408
Preliminary Technical Data
Rev. PrC | Page 10 of 22
0 – Event Output on Alarm or Critical temp event (default)
1 – Event only if temperature is above the value in the critical temp register
When either of the lock bits is set, this bit cannot be altered until unlocked.
D3
Event Output Control
0 – Event Output Disabled (default)
1 – Event Output Enabled
When either of the lock bits is set, this bit cannot be altered until unlocked.
D4
Event Status (read only)
0 – Event Output condition is not being asserted by this device
1 – Event Output pin is being asserted by this device due to Alarm Window or Critical trip condition
The actual event causing the event can be determined from the Read Temperature register. Interrupt Events can be cleared by
writing to “Clear Event” bit. Writing to this bit will have no effect.
D5
Clear Event (write only)
0 – No effect
1 – Clears active event in Interrupt Mode. Writing to this register has no effect in Comparator Mode. When read, this bit will always
return zero ‘0’. Once the DUT temperature is greater than the Critical Temperature, Event cannot be cleared.
D6
Alarm Window Lock bit
0 – Alarm Trips are not locked and can be altered (default)
1 – Alarm Trip register settings cannot be altered
This bit is initially cleared. When set this bit will return a 1, and remain locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
D7
Critical Trip Lock bit
0 – Critical Trip is not locked and can be altered (default)
1 – Critical Trip register settings cannot be altered
This bit is initially cleared. When set this bit will return a 1, and remain locked until cleared by internal power on reset. These bits
can be written with a single write and do not require double writes.
D8
Shutdown Mode
0 – Enabled TS (default)
1 – Shutdown TS
When shutdown, the thermal sensing device and A/D converter are disabled to save power, no events will be generated. When
either of the lock bits is set, this bit cannot be set until unlocked. However it can be cleared at any time.
D10:9
Hysteresis Enable
00 – Disable Hysteresis
01 – Enable Hysteresis at 1.5oC
10 – Enable Hysteresis at 3oC
11 – Enable Hysteresis at 6oC
When enabled, hysteresis is applied to temperature movement around trigger points. For example, consider the behavior of the
“Above Alarm Window” bit (Bit 14 of the Temperature Register) when the hysteresis is set to 3oC. As the temperature rises, But 14
will be set to 1 (temperature is above the alarm window) when the Temperature Register contains a value that is greater than the
value in the Alarm Temperature Upper Boundary Register. If the temperature decreases, Bit 14 will remain set until the measured
temperature is less than or equal to the value in the Alarm Temperature Upper Boundary Register minus 3oC. See Figure X for more
detail.
Similarly, the “Below Alarm Window” bit (Bit 13 of the Temperature Register) will be set to 0 (temperature is equal to or above the
Alarm window lower boundary trip temperature) when the value in the temperature register is equal to or greater than the value
in the Alarm Temperature Lower Boundary Register. As the temperature decreases, Bit 13 will be set to 1 when the value in the
Temperature Register is equal to or less than the value in the Alarm Temperature Lower Boundary Register minus 3oC.
Note that hysteresis is also applied to Event# pin functionality. When either of the lock bits is set, these bits cannot be altered.
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