參數資料
型號: ADSP-BF548MBBCZ-5M
廠商: ANALOG DEVICES INC
元件分類: 數字信號處理
英文描述: 533 MHz Blackfin Embedded Processor: ADSP-BF548MBBCZ-5M Temp Range: –40°C to +85°C Package: 400-Ball CSP_BGA BC-400-1
中文描述: 16-BIT, 50 MHz, OTHER DSP, PBGA400
封裝: 17 X 17 MM, ROHS COMPLIANT, CSBGA-400
文件頁數: 47/100頁
文件大?。?/td> 3095K
代理商: ADSP-BF548MBBCZ-5M
Rev. D
|
Page 50 of 100
|
May 2011
ADSP-BF542/ADSP-BF544/ADSP-BF547/ADSP-BF548/ADSP-BF549
External Port Bus Request and Grant Cycle Timing
on Page 51 describe external port bus request and grant cycle
operations for synchronous and for asynchronous BR.
Table 34. External Port Bus Request and Grant Cycle Timing with Synchronous BR
Parameter
Min
Max
Unit
Timing Requirements
tBS
BR Asserted to CLKOUT Low Setup
5.0
ns
tBH
CLKOUT Low to BR Deasserted Hold Time
0.0
ns
Switching Characteristics
tSD
CLKOUT Low to AMSx, Address, and ARE/AWE Disable
5.0
ns
tSE
CLKOUT Low to AMSx, Address, and ARE/AWE Enable
5.0
ns
tDBG
CLKOUT Low to BG Asserted Output Delay
4.0
ns
tEBG
CLKOUT Low to BG Deasserted Output Hold
4.0
ns
tDBH
CLKOUT Low to BGH Asserted Output Delay
3.6
ns
tEBH
CLKOUT Low to BGH Deasserted Output Hold
3.6
ns
Figure 21. External Port Bus Request and Grant Cycle Timing with Synchronous BR
AMSx
CLKOUT
BG
BGH
BR
ADDR 19-1
ABE1-0
tBH
tBS
tSD
tSE
tSD
tSE
t
EBG
tDBG
t
EBH
tDBH
AWE
ARE
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