
Rev. A
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Page 32 of 48
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August 2006
ADSP-218xN
Memory Write
Table 19. Memory Write
Parameter
Min
Max
Unit
Switching Characteristics:
tDW
Data Setup before WR High1
0.5tCK– 4 + w
ns
tDH
Data Hold after WR High
0.25tCK – 1
ns
tWP
WR Pulse Width
0.5tCK – 3 + w
ns
tWDE
WR Low to Data Enabled
0
ns
tASW
A13 – 0, xMS Setup before WR Low
2
0.25tCK – 3
ns
tDDR
Data Disable before WR or RD Low
0.25tCK – 3
ns
tCWR
CLKOUT High to WR Low
0.25tCK – 2
0.25tCK + 4
ns
tAW
A13 – 0, xMS Setup before WR Deasserted
0.75tCK – 5 + w
ns
tWRA
A13 – 0, xMS Hold after WR Deasserted
0.25tCK – 1
ns
tWWR
WR High to RD or WR Low
0.5tCK – 3
ns
1 w = wait states 3 t
CK.
2 xMS = PMS, DMS, CMS, IOMS, BMS.
Figure 30. Memory Write
CLKOUT
tWP
tAW
tCWR
tDH
tWDE
tDW
tASW
tWWR
tWRA
tDDR
DMS, PMS,
BMS, CMS,
IOMS
RD
WR
1ADDRESS LINES FOR ACCESSES ARE:
2DATA LINES FOR ACCESSES ARE:
BDMA: A13–0 (14 LSBs), D23–16 (8 MSBs)
BDMA: D15–8
I/O SPACE: A10–0
I/O SPACE: D23–8
EXTERNAL PM AND DM: A13–0
EXTERNAL DM: D23–8
EXTERNAL PM: D23–0
ADDRESS LINES1
DATA LINES2