- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄19384 > ADSP-2189MBSTZ-266 (Analog Devices Inc)IC DSP CONTROLLER 16BIT 100-LQFP PDF資料下載
參數(shù)資料
| 型號： | ADSP-2189MBSTZ-266 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 23/32頁 |
| 文件大小： | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100-LQFP |
| 標準包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 66MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 192kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 2.50V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應商設備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
| 其它名稱： | ADSP-2189MBSTZ266 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁當前第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁
REV. A
ADSP-2189M
–3–
The internal result (R) bus connects the computational units so
that the output of any unit may be the input of any unit on the
next cycle.
A powerful program sequencer and two dedicated data address
generators ensure efficient delivery of operands to these compu-
tational units. The sequencer supports conditional jumps, sub-
routine calls and returns in a single cycle. With internal loop
counters and loop stacks, the ADSP-2189M executes looped
code with zero overhead; no explicit jump instructions are re-
quired to maintain loops.
Two data address generators (DAGs) provide addresses for
simultaneous dual operand fetches (from data memory and
program memory). Each DAG maintains and updates four
address pointers. Whenever the pointer is used to access data
(indirect addressing), it is post-modified by the value of one of
four possible modify registers. A length value may be associated
with each pointer to implement automatic modulo addressing
for circular buffers.
Efficient data transfer is achieved with the use of five internal
buses:
Program Memory Address (PMA) Bus
Program Memory Data (PMD) Bus
Data Memory Address (DMA) Bus
Data Memory Data (DMD) Bus
Result (R) Bus
The two address buses (PMA and DMA) share a single external
address bus, allowing memory to be expanded off-chip and the
two data buses (PMD and DMD) share a single external data
bus. Byte memory space and I/O memory space also share the
external buses.
Program memory can store both instructions and data, permit-
ting the ADSP-2189M to fetch two operands in a single cycle,
one from program memory and one from data memory. The
ADSP-2189M can fetch an operand from program memory and
the next instruction in the same cycle.
In lieu of the address and data bus for external memory connec-
tion, the ADSP-2189M may be configured for 16-bit Internal
DMA port (IDMA port) connection to external systems. The
IDMA port is made up of 16 data/address pins and five control
pins. The IDMA port provides transparent, direct access to the
DSPs on-chip program and data RAM.
An interface to low cost byte-wide memory is provided by the
Byte DMA port (BDMA port). The BDMA port is bidirectional
and can directly address up to four megabytes of external RAM
or ROM for off-chip storage of program overlays or data tables.
The byte memory and I/O memory space interface supports
slow memories and I/O memory-mapped peripherals with pro-
grammable wait-state generation. External devices can gain
control of external buses with bus request/grant signals (
BR,
BGH and BG). One execution mode (Go Mode) allows the
ADSP-2189M to continue running from on-chip memory.
Normal execution mode requires the processor to halt while
buses are granted.
The ADSP-2189M can respond to eleven interrupts. There can
be up to six external interrupts (one edge-sensitive, two level-
sensitive and three configurable) and seven internal interrupts
generated by the timer, the serial ports (SPORTs), the Byte
DMA port and the power-down circuitry. There is also a master
RESET signal. The two serial ports provide a complete synchro-
nous serial interface with optional companding in hardware and
a wide variety of framed or frameless data transmit and receive
modes of operation.
Each port can generate an internal programmable serial clock or
accept an external serial clock.
The ADSP-2189M provides up to 13 general-purpose flag pins.
The data input and output pins on SPORT1 can be alternatively
configured as an input flag and an output flag. In addition, eight
flags are programmable as inputs or outputs and three flags are
always outputs.
A programmable interval timer generates periodic interrupts. A
16-bit count register (TCOUNT) decrements every n processor
cycles, where n is a scaling value stored in an 8-bit register
(TSCALE). When the value of the count register reaches zero,
an interrupt is generated and the count register is reloaded from
a 16-bit period register (TPERIOD).
Serial Ports
The ADSP-2189M incorporates two complete synchronous
serial ports (SPORT0 and SPORT1) for serial communications
and multiprocessor communication.
Here is a brief list of the capabilities of the ADSP-2189M
SPORTs. For additional information on Serial Ports, refer to
the ADSP-2100 Family User’s Manual, Third Edition.
SPORTs are bidirectional and have a separate, double-buff-
ered transmit and receive section.
SPORTs can use an external serial clock or generate their
own serial clock internally.
SPORTs have independent framing for the receive and trans-
mit sections. Sections run in a frameless mode or with frame
synchronization signals internally or externally generated.
Frame sync signals are active high or inverted, with either of
two pulsewidths and timings.
SPORTs support serial data word lengths from 3 to 16 bits
and provide optional A-law and
-law companding according
to CCITT recommendation G.711.
SPORT receive and transmit sections can generate unique
interrupts on completing a data word transfer.
SPORTs can receive and transmit an entire circular buffer of
data with only one overhead cycle per data word. An interrupt
is generated after a data buffer transfer.
SPORT0 has a multichannel interface to selectively receive
and transmit a 24- or 32-word, time-division multiplexed,
serial bitstream.
SPORT1 can be configured to have two external interrupts
(
IRQ0 and IRQ1) and the Flag In and Flag Out signals. The
internally generated serial clock may still be used in this con-
figuration.
PIN DESCRIPTIONS
The ADSP-2189M will be available in a 100-lead LQFP pack-
age. In order to maintain maximum functionality and reduce
package size and pin count, some serial port, programmable
flag, interrupt and external bus pins have dual, multiplexed
functionality. The external bus pins are configured during
RESET only, while serial port pins are software configurable
during program execution. Flag and interrupt functionality is
retained concurrently on multiplexed pins. In cases where pin
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ACC30DRAH | CONN EDGECARD 60POS .100 R/A DIP |
| VE-B1W-CV-F3 | CONVERTER MOD DC/DC 5.5V 150W |
| EMA50DRST-S664 | CONN EDGECARD 100PS DIP .125 SLD |
| TLJH107M010R0900 | CAP TANT 100UF 10V 20% 1210 |
| RSM44DSEF | CONN EDGECARD 88POS .156 EYELET |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADSP-2189MKCA-300 | 功能描述:IC DSP CONTROLLER 16BIT 144MBGA RoHS:否 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-2189MKCAZ-300 | 功能描述:IC DSP CONTROLLER 16BIT 144-MBGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標準包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI，以太網(wǎng)，RS-232 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA，F(xiàn)CBGA 供應商設備封裝:431-FCPBGA（20x20） 包裝:托盤 |
| ADSP-2189MKST-300 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 75MHz 75MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:32K/48K 16 BIT DSP 75 MIPS - Bulk 制造商:Analog Devices 功能描述:IC MICROCOMPUTER 16-BIT |
| ADSP-2189MKSTZ-300 | 功能描述:IC DSP CONTROLLER 16BIT 100-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP（數(shù)字式信號處理器） 系列:ADSP-21xx 標準包裝:40 系列:TMS320DM64x, DaVinci™ 類型:定點 接口:I²C，McASP，McBSP 時鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類型:表面貼裝 封裝/外殼:548-BBGA，F(xiàn)CBGA 供應商設備封裝:548-FCBGA（27x27） 包裝:托盤 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA |
| ADSP-2189MKSTZ-300 | 制造商:Analog Devices 功能描述:IC 16-BIT MICROCOMPUTER |
發(fā)布緊急采購，3分鐘左右您將得到回復。