Timing Requirements: tIFS
參數(shù)資料
型號(hào): ADSP-2188MBSTZ-266
廠商: Analog Devices Inc
文件頁(yè)數(shù): 18/40頁(yè)
文件大?。?/td> 0K
描述: IC DSP CONTROLLER 16BIT 100LQFP
標(biāo)準(zhǔn)包裝: 1
系列: ADSP-21xx
類型: 定點(diǎn)
接口: 主機(jī)接口,串行端口
時(shí)鐘速率: 66MHz
非易失內(nèi)存: 外部
芯片上RAM: 256kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 2.50V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-LQFP
供應(yīng)商設(shè)備封裝: 100-LQFP(14x14)
包裝: 托盤
REV. 0
ADSP-2188M
–25–
Parameter
Min
Max
Unit
Interrupts and Flags
Timing Requirements:
tIFS
IRQx, FI, or PFx Setup before CLKOUT Low1, 2, 3, 4
0.25tCK + 10
ns
tIFH
IRQx, FI, or PFx Hold after CLKOUT High1, 2, 3, 4
0.25tCK
ns
Switching Characteristics:
tFOH
Flag Output Hold after CLKOUT Low
5
0.5tCK – 5ns
tFOD
Flag Output Delay from CLKOUT Low5
0.5tCK + 4
ns
NOTES
1If
IRQx and FI inputs meet t
IFS and tIFH setup/hold requirements, they will be recognized during the current clock cycle; otherwise the signals will be recognized on
the following cycle. (Refer to “Interrupt Controller Operation” in the Program Control chapter of the ADSP-2100 Family User’s Manual for further information on
interrupt servicing.)
2Edge-sensitive interrupts require pulsewidths greater than 10 ns; level-sensitive interrupts must be held low until serviced.
3
IRQx = IRQ0, IRQ1, IRQ2, IRQL0, IRQL1, IRQLE.
4PFx = PF0, PF1, PF2, PF3, PF4, PF5, PF6, PF7.
5Flag Outputs = PFx, FL0, FL1, FL2, FO.
tFOD
tFOH
tIFH
tIFS
CLKOUT
FLAG
OUTPUTS
IRQx
FI
PFx
Figure 22. Interrupts and Flags
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