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參數(shù)資料
| 型號(hào)： | ADSP-2183KCAZ-210 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 17/31頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP 16BIT 52MHZ 144-BGA |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點(diǎn) |
| 接口： | 同步串行端口（SSP） |
| 時(shí)鐘速率： | 52MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 80kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 144-LFBGA |
| 供應(yīng)商設(shè)備封裝： | 144-迷你型BGA |
| 包裝： | 托盤 |
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ADSP-2183
–24–
REV. C
OUTPUT DRIVE CURRENTS
Figure 19 shows typical I-V characteristics for the output drivers
of the ADSP-2183. The curves represent the current drive
capability of the output drivers as a function of output voltage.
SOURCE VOLTAGE – V
100
–75
–150
0
5.25
SOURCE
CURRENT
–
mA
0.75
1.50
2.25
3.00
3.75
4.50
75
–50
–100
–125
25
–25
50
0
–175
–200
3.0V, +85
°C
3.3V, +25
°C
3.6V, –40
°C
3.0V, +85
°C
3.3V, +25
°C
3.6V, –40
°C
Figure 19. Typical Drive Currents
NOTES:
1. REFLECTS ADSP-2183 OPERATION IN LOWEST POWER MODE.
(SEE "SYSTEM INTERFACE" CHAPTER OF THE ADSP-2100 FAMILY
USER'S MANUAL FOR DETAILS.)
2. CURRENT REFLECTS DEVICE OPERATING WITH NO INPUT LOADS.
VDD = 3.6V
VDD = 3.3V
VDD = 3.0V
TEMPERATURE – °C
CURRENT
(LOG
SCALE)
–
A
1000
100
0
085
25
55
10
Figure 20. Power-Down Supply Current (Typical)
POWER DISSIPATION
To determine total power dissipation in a specific application,
the following equation should be applied for each output:
C
× V
DD
2
× f
C = load capacitance, f = output switching frequency.
Example:
In an application where external data memory is used and no
other outputs are active, power dissipation is calculated as
follows:
Assumptions:
External data memory is accessed every cycle with 50% of the
address pins switching.
External data memory writes occur every other cycle with
50% of the data pins switching.
Each address and data pin has a 10 pF total load at the pin.
The application operates at V
DD = 3.3 V and tCK = 30.0 ns.
Total Power Dissipation = PINT + (C
× VDD2 × f )
PINT = internal power dissipation from Power vs. Frequency
graph (Figure 20).
(C
× V
DD
2
× f ) is calculated for each output:
# of
Pins
× C
× VDD2
× f
Address,
DMS
8
× 10 pF × 3.32 V × 33.3 MHz = 29.0 mW
Data Output,
WR 9
× 10 pF × 3.32 V × 16.67 MHz = 16.3 mW
RD
1
× 10 pF × 3.32 V × 16.67 MHz =
1.8 mW
CLKOUT
1
× 10 pF × 3.32 V × 33.3 MHz =
3.6 mW
50.7 mW
Total power dissipation for this example is PINT + 50.7 mW.
1/tCK – MHz
220
160
115
28
52
32
36
40
44
48
205
175
145
130
190
100
85
70
2183 POWER, INTERNAL1, 3, 4
VDD = 3.6V
VDD = 3.3V
VDD = 3.0V
184mW
150mW
120mW
110mW
90mW
72mW
1/tCK – MHz
50
25
10
28
52
32
36
40
44
48
45
30
20
15
40
35
5
0
POWER, IDLE1, 2, 3
VDD = 3.6V
VDD = 3.3V
VDD = 3.0V
38mW
30mW
24mW
27mW
20mW
15mW
1/tCK – MHz
32
22
16
44
28
32
36
40
30
24
20
18
28
26
14
12
10
8
POWER, IDLE n MODES3
48
52
IDLE
IDLE (16)
IDLE (128)
30mW
13.8mW
13mW
20mW
11mW
10.6mW
VALID FOR ALL TEMPERATURE GRADES.
1POWER REFLECTS DEVICE OPERATING WITH NO OUTPUT LOADS.
2IDLE REFERS TO ADSP-2183 STATE OF OPERATION DURING EXECUTION OF IDLE
INSTRUCTION. DEASSERTED PINS ARE DRIVEN TO EITHER VDD OR GND.
3TYPICAL POWER DISSIPATION AT 3.3V VDD AND 25 C EXCEPT WHERE SPECIFIED.
4IDD MEASUREMENT TAKEN WITH ALL INSTRUCTIONS EXECUTING FROM INTERNAL
MEMORY. 50% OF THE INSTRUCTIONS ARE MULTIFUNCTION (TYPES 1,4,5,12,13,14),
30% ARE TYPE 2 AND TYPE 6, AND 20% ARE IDLE INSTRUCTIONS.
Figure 21. Power vs. Frequency
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