參數(shù)資料
型號(hào): ADSP-2161KS-66
廠商: ANALOG DEVICES INC
元件分類(lèi): 數(shù)字信號(hào)處理
英文描述: DSP Microcomputers with ROM
中文描述: 24-BIT, 16.67 MHz, OTHER DSP, PQFP80
封裝: METRIC, PLASTIC, QFP-80
文件頁(yè)數(shù): 11/39頁(yè)
文件大小: 243K
代理商: ADSP-2161KS-66
REV. 0
ADSP-216x
–11–
Instruction Set
The ADSP-216x assembly language uses an algebraic syntax for
ease of coding and readability. The sources and destinations of
computations and data movements are written explicitly in each
assembly statement, eliminating cryptic assembler mnemonics.
Every instruction assembles into a single 24-bit word and executes
in a single cycle. The instructions encompass a wide variety of
instruction types along with a high degree of operational
parallelism. There are five basic categories of instructions: data
move instructions, computational instructions, multifunction
instructions, program flow control instructions and miscella-
neous instructions. Multifunction instructions perform one or
two data moves and a computation.
The instruction set is summarized below. The
ADSP-2100
Family Users Manual
contains a complete reference to the
instruction set.
ALU Instructions
[IF cond]
AR|AF
=
=
=
=
=
=
=
=
=
=
=
=
=
=
xop + yop [+ C] ;
xop – yop [+ C– 1] ;
yop – xop [+ C– 1] ;
xop AND yop ;
xop OR yop ;
xop XOR yop ;
PASS xop ;
– xop ;
NOT xop ;
ABS xop ;
yop + 1 ;
yop – 1 ;
DIVS yop, xop ;
DIVQ xop ;
Add/Add with Carry
Subtract X – Y/Subtract X – Y with Borrow
Subtract Y – X/Subtract Y – X with Borrow
AND
OR
XOR
Pass, Clear
Negate
NOT
Absolute Value
Increment
Decrement
Divide
MAC Instructions
[IF cond]
MR|MF =
xop
*
yop ;
MR + xop
*
yop ;
MR – xop
*
yop ;
MR ;
0 ;
Multiply
Multiply/Accumulate
Multiply/Subtract
Transfer MR
Clear
Conditional MR Saturation
=
=
=
=
IF MV SAT MR ;
Shifter Instructions
[IF cond]
[IF cond]
SR = [SR OR] ASHIFT xop ;
SR = [SR OR] LSHIFT xop ;
SR = [SR OR] ASHIFT xop BY <exp>;
SR = [SR OR] LSHIFT xop BY <exp>;
SE = EXP xop ;
SB = EXPADJ xop ;
SR = [SR OR] NORM xop ;
Data Move Instructions
reg = reg ;
reg = <data> ;
reg = DM (<addr>) ;
dreg = DM (Ix , My) ;
dreg = PM (Ix , My) ;
DM (<addr>) = reg ;
DM (Ix , My) = dreg ;
PM (Ix , My) = dreg ;
Multifunction Instructions
<ALU>|<MAC>|<SHIFT> , dreg = dreg ;
<ALU>|<MAC>|<SHIFT> , dreg = DM (Ix , My) ;
<ALU>|<MAC>|<SHIFT> , dreg = PM (Ix , My) ;
DM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
PM (Ix , My) = dreg , <ALU>|<MAC>|<SHIFT> ;
dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
<ALU>|<MAC> , dreg = DM (Ix , My) , dreg = PM (Ix , My) ;
Arithmetic Shift
Logical Shift
Arithmetic Shift Immediate
Logical Shift Immediate
Derive Exponent
Block Exponent Adjust
Normalize
[IF cond]
[IF cond]
[IF cond]
Register-to-Register Move
Load Register Immediate
Data Memory Read (Direct Address)
Data Memory Read (Indirect Address)
Program Memory Read (Indirect Address)
Data Memory Write (Direct Address)
Data Memory Write (Indirect Address)
Program Memory Write (Indirect Address)
Computation with Register-to-Register Move
Computation with Memory Read
Computation with Memory Read
Computation with Memory Write
Computation with Memory Write
Data & Program Memory Read
ALU/MAC with Data & Program Memory Read
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