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Rev. PrB
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Page 16 of 52
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September 2004
ADSP-21364
Preliminary Technical Data
MAXIMUM POWER DISSIPATION
The data in this table is based on theta JA (
θ
JA
) established per
JEDEC standards JESD51-2 and JESD51-6. See Engineer-to-
Engineer note (EE-TBD) for further information. For informa-
tion on package thermal specifications, see
Thermal
Characteristics on Page 44
.
ABSOLUTE MAXIMUM RATINGS
ESD SENSITIVITY
TIMING SPECIFICATIONS
The ADSP-21364’s internal clock (a multiple of CLKIN) pro-
vides the clock signal for timing internal memory, processor
core, serial ports, and parallel port (as required for read/write
strobes in asynchronous access mode). During reset, program
the ratio between the processor’s internal clock frequency and
external (CLKIN) clock frequency with the CLKCFG1–0 pins.
To determine switching frequencies for the serial ports, divide
down the internal clock, using the programmable divider con-
trol of each port (DIVx for the serial ports).
The ADSP-21364’s internal clock switches at higher frequencies
than the system input clock (CLKIN). To generate the internal
clock, the processor uses an internal phase-locked loop (PLL).
This PLL-based clocking minimizes the skew between the sys-
tem clock (CLKIN) signal and the processor’s internal clock (the
clock source for the parallel port logic and I/O pads).
Max Ambient
Temp
1
70
°
C
85
°
C
105
°
C
1
Power Dissipation greater than that listed above may cause permanent damage to the device.
For more information, see Thermal Characteristics on Page 44.
2
Heat slug soldered to PCB
3
Heat slug not soldered to PCB
4
Thermal vias in PCB
5
No thermal vias in PCB
144 INT–HS
LQFP
2
3.33W
2.42W
1.21W
144 INT–HS
LQFP
3
2.10W
N/A
N/A
136 Mini-
BGA
4
2.44W
1.77W
N/A
136 Mini-
BGA
5
2.18W
N/A
N/A
Parameter
Internal (Core) Supply Voltage (V
DDINT
)
1
Analog (PLL) Supply Voltage (A
VDD
)
1
External (I/O) Supply Voltage (V
DDEXT
)
1
Input Voltage–0.5 V to V
DDEXT
1
Output Voltage Swing–0.5 V to V
DDEXT
1
Load Capacitance
1
Storage Temperature Range
1
Junction Temperature under Bias
Rating
–0.3 V to +1.5 V
–0.3 V to +1.5 V
–0.3 V to +4.6 V
+ 0.5 V
+ 0.5 V
200 pF
–65
°
C to +150
°
C
125
°
C
1
Stresses greater than those listed above may cause permanent damage to the device. These
are stress ratings only; functional operation of the device at these or any other conditions
greater than those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect device
reliability.
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the ADSP-21364 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.