參數(shù)資料
型號(hào): ADSP-21362
廠商: Analog Devices, Inc.
元件分類: 數(shù)字信號(hào)處理
英文描述: SHARC Processor
中文描述: SHARC處理器
文件頁數(shù): 14/52頁
文件大?。?/td> 1320K
代理商: ADSP-21362
Rev. A
|
Page 14 of 52
|
December 2006
ADSP-21362/ADSP-21363/ADSP-21364/ADSP-21365/ADSP-21366
RSTOUT/CLKOUT O
Output only
Local Clock Out/Reset Out
. Drives out the core reset signal to an external device.
CLKOUT can also be configured as a reset out pin. The functionality can be switched
between the PLL output clock and reset out by setting Bit 12 of the PMCTREG register.
The default is reset out.
Processor Reset
. Resets the ADSP-2136x to a known state. Upon deassertion, there is
a 4096 CLKIN cycle latency for the PLL to lock. After this time, the core begins program
execution from the hardware reset vector address. The RESET input must be asserted
(low) at power-up.
Test Clock (JTAG)
. Provides a clock for JTAG boundary scan. TCK must be asserted
(pulsed low) after power-up or held low for proper operation of the processors.
Test Mode Select (JTAG)
. Used to control the test state machine. TMS has a 22.5 k
Ω
internal pull-up resistor.
Test Data Input (JTAG)
. Provides serial data for the boundary scan logic. TDI has a
22.5 k
Ω
internal pull-up resistor.
Test Data Output (JTAG)
. Serial scan output of the boundary scan path.
Test Reset (JTAG)
. Resets the test state machine. TRST must be asserted (pulsed low)
after power-up or held low for proper operation of the ADSP-2136x. TRST has a
22.5 k
Ω
internal pull-up resistor.
Emulation Status
. Must be connected to the processor’s JTAG emulators target board
connector only. EMU has a 22.5 k
Ω
internal pull-up resistor.
Core Power Supply
. Nominally +1.2 V dc for the K, B grade models, and
1.0 V dc for the Y and W grade models, and supplies the processor’s core (13 pins).
I/O Power Supply
. Nominally +3.3 V dc (6 pins).
Analog Power Supply
. Nominally +1.2 V dc for the K, B grade models, and
1.0 V dc for the Y and W Grade models, and supplies the processor’s internal PLL (clock
generator). This pin has the same specifications as V
DDINT
, except that added filtering
circuitry is required.
For more information, see Power Supplies on Page 9.
Analog Power Supply Return
.
Power Supply Return
.
(54 pins)
RESET
I/A
Input only
TCK
I
Input only
3
TMS
I/S
(pu)
I/S
(pu)
O
I/A
(pu)
Three-state with
pull-up enabled
Three-state with
pull-up enabled
Three-state
4
Three-state with
pull-up enabled
TDI
TDO
TRST
EMU
O (O/D)
(pu)
P
Three-state with
pull-up enabled
V
DDINT
V
DDEXT
A
VDD
P
P
A
VSS
GND
G
G
1
RD, WR, and ALE are three-stated (and not driven) only when RESET is active.
2
Output only is a three-state driver with its output path always enabled.
3
Input only is a three-state driver with both output path and pull-up disabled.
4
Three-state is a three-state driver with pull-up disabled.
Table 4. Pin Descriptions (Continued)
Pin
Type
State During and
After Reset
Description
相關(guān)PDF資料
PDF描述
ADSP-21362BBC-1AA SHARC Processor
ADSP-21362BBCZ-1AA SHARC Processor
ADSP-21362KBC-1AA SHARC Processor
ADSP-21362KBCZ-1AA SHARC Processor
ADSP-21362WBBCZ-1A SHARC Processor
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
adsp-21362bbc-1aa 制造商:Analog Devices 功能描述:
ADSP-21362BBCZ-1AA 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC 333 MHz Processor includes DTCP/SPDIF RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
ADSP-21362BSWZ-1AA 功能描述:IC DSP 32BIT 333MHZ EPAD 144LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤
ADSP-21362KBC-1AA 制造商:Analog Devices 功能描述:DSP Floating-Point 32-Bit/40-Bit 333MHz 333MIPS 136-Pin CSP-BGA
ADSP-21362KBCZ-1AA 制造商:AD 制造商全稱:Analog Devices 功能描述:SHARC Processor