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參數(shù)資料
| 型號(hào)： | ADS900 |
| 英文描述： | 10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
| 文件頁(yè)數(shù)： | 9/12頁(yè) |
| 文件大?。?/td> | 219K |
| 代理商： | ADS900 |
9
ADS900
The pipelined quantizer architecture has 9 stages with each
stage containing a two-bit quantizer and a two bit digital-
to-analog converter, as shown in Figure 2. Each two-bit
quantizer stage converts on the edge of the sub-clock, which
is the same frequency of the externally applied clock. The
output of each quantizer is fed into its own delay line to
time-align it with the data created from the following quan-
tizer stages. This aligned data is fed into a digital error
correction circuit which can adjust the output data based on
the information found on the redundant bits. This technique
provides the ADS900 with excellent differential linearity
and guarantees no missing codes at the 10-bit level.
The ADS900 includes an internal reference circuit that
provides the bias voltages for the internal stages (for details
see “Internal Reference”). A midpoint voltage is established
by the built-in resistor ladder that is made available at pin 26
“CM”. This voltage can be used to bias the inputs up to the
recommended common-mode voltage or used to level shift
the input driving circuitry. The ADS900 can be used in both
a single-ended or differential input configuration. When
operated in single-ended mode, the reference midpoint (pin
26) should be tied to the inverting input, pin 24.
To accommodate a bipolar signal swing, the ADS900 oper-
ates with a common-mode voltage (V
CM
) which is derived
from the internal references. Due to the symmetric resistor
ladder inside the ADS900, the V
CM
is situated between the
top and bottom reference voltage. Equation (1) can be used
for calculating the common-mode voltage level.
V
CM
= (REFT +REFB)/2
(1)
DIGITAL OUTPUT DATA
The 10-bit output data is provided at CMOS logic levels.
There is a 5.0 clock cycle data latency from the start convert
signal to the valid output data. The standard output coding
is Straight Offset Binary where a full scale input signal
corresponds to all “1’s” at the output. The digital outputs of
the ADS900 can be set to a high impedance state by driving
the OE (pin 16) with a logic “HI”. Normal operation is
achieved with pin 16 “LO” or Floating due to internal pull-
down resistor. This function is provided for testability
purposes but is not recommended to be used dynamically.
The capacitive loading on the digital outputs should be kept
below 15pF.
APPLICATIONS
DRIVING THE ANALOG INPUTS
Figure 3 shows an example of an ac-coupled, single-ended
interface circuit using high-speed op amps that operate on
dual supplies (OPA650, OPA658, OPA680 and OPA681).
The common-mode reference voltage (V
CM
), here +1.5V,
biases the bipolar, ground-referenced input signal. The ca-
pacitor C
1
and resistor R
1
form a high-pass filter with the
–3dB frequency set at
f
–3dB
= 1/(2
π
R
1
C
1
)
(2)
The values for C
1
and R
1
are not critical in most applications
and can be set freely. The values shown correspond to a
TABLE I. Coding Table for the ADS900.
+FS (IN = +2V)
+FS –1LSB
+FS –2LSB
+3/4 Full Scale
+1/2 Full Scale
+1/4 Full Scale
+1LSB
Bipolar Zero (IN +1.5V)
–1LSB
–1/4 Full Scale
–1/2 Full Scale
–3/4 Full Scale
–FS +1LSB
–FS (IN = +1V)
1111111111
1111111111
1111111110
1110000000
1100000000
1010000000
1000000001
1000000000
0111111111
0110000000
0100000000
0010000000
0000000001
0000000000
STRAIGHT OFFSET BINARY
(SOB)
PIN 12
FLOATING or LO
SINGLE-ENDED INPUT
(IN = 1.5V DC)
FIGURE 3. AC-Coupled Driver.
–3dB corner frequency of 1.6kHz.
Figure 4 depicts a circuit that can be used in single-supply
applications. The common-mode voltage biases the op amp
up to the appropriate common-mode voltage, for example
V
CM
= +1.5V. With the use of capacitor C
G
the DC gain for
the non-inverting op amp input is set to +1V/V. As a result
the transfer function is modified to
V
OUT
= V
IN
{(1 + R
F
/R
G
) + V
CM
}
Again, the input coupling capacitor C
1
and resistor R
1
form
a high-pass filter. At the same time the input impedance is
defined by R
1
. Resistor R
S
isolates the op amp’s output from
the capacitive load to avoid gain peaking or even oscillation.
It can also be used to establish a defined roll-off for the
wideband noise. Its value is usually between 10
and 100
.
(3)
DIFFERENTIAL MODE OF OPERATION
Some minor performance improvements in SFDR and THD
can be realized by operating the ADS900 in its optional
differential configuration. A RF-transformer with a center
tap provides the best method of performing a single-ended to
differential conversion and interface directly to the ADS900.
402
OPA65x
OPA68x
V
IN
402
R
1
1k
V
CM
C
0.1μF
0.1μF
IN
IN
1.5V
CM
+5V
R
S
–5V
+3V
ADS900
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS900E | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900E/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900E/1KG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS900EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 20 MSPS SE/Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS901 | 制造商:BB 制造商全稱(chēng):BB 功能描述:10-Bit, 20MHz, #V Supply ANALOG-TO-DIGITAL CONVERTER |
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