參數(shù)資料
型號： ADS8413IBRGZT
英文描述： 16-BIT, 2-MSPS, LVDS SERIAL INTERFACE, SAR ANALOG-TO-DIGITAL CONVERTER
中文描述： 16位，2 MSPS的LVDS串行接口，SAR類比數(shù)位轉(zhuǎn)換器
文件頁數(shù)： 8/38頁
文件大?。?/td> 1197K
代理商： ADS8413IBRGZT
www.ti.com
ADS8413
SLAS490–OCTOBER 2005
DEVICE INFORMATION (continued)
TERMINAL FUNCTIONS (continued)
TERMINAL
NO.
I/O
DESCRIPTION
NAME
I
SYNC_I +
SYNC_I–
Connect to previous device SYNC_O with same polarity, while device is selected to operate in daisy
chain mode.
Dasiy
Chain
30,
31
Mode 1 (valid in cascade mode only). CLK_O available while M1=1 (LVDS) or M1+ is pulled up to
+VBD and M1– is grounded (AGND). CLK_O o/p goes to 3-state when M1 = 0 (LVDS) or M1+ is
grounded (AGND) and M1– is pulled up to +VBD. Do not allow these pins to float.
M1+
M1–
I
Cascade
I
SDI+
SDI–
Serial data input. Connect to previous device SDO with same polarity, while device is selected to
operate in daisy chain mode.
Daisy
Chain
32,
33
Mode 2 (valid in cascade mode only). Doubles LVDS o/p current while M2 = 1 (LVDS) or M2+ is
pulled up to +VBD and M2– is grounded (AGND). LVDS o/p current is normal (3.4 mA typ) when M2
= 0 (LVDS) or M2+ is grounded (AGND) and M2 – is pulled up to +VBD. Do not allow these pins to
float.
M2+
M2–
I
Cascade
34,
35
38,
39
40,
41
42,
43
CLK_I+
CLK_I–
CLK_O–
CLK_O+
SDO–
SDO+
SYNC_O –
SYNC_O +
I
Serial external clock input. Set CLK_I/E (pin 7) = 0 to select external clock source.
Serial clock out. Data is latched out on the rising edge of CLK_O and can be captured on the next
falling edge.
O
O
Serial data out. Data is latched out on the rising edge of CLK_O with MSB first format.
O
Synchronizes the data frame.
(2)
CMOS I/O PINS
1
CS
I
Chip select, active low signal. All of the LVDS o/p except CLK_O are 3-state if this pin is high.
CMOS equivalent of CSTART input. So functionality is the same as the CSTART input. Set CONVST
= 0 when the CSTART input is used.
Controls the data frame
(2)
duration. The frame duration is 16 CLKs if BYTE = 0 or 8 CLKs if BYTE =
1.
Active low input, acts as device power down.
Selects nap mode while high. Device enters nap state at conversion end and remains so until next
acquisition phase begins.
Selects cascade (MODE_C/D = 1) or daisy chain mode (MODE_C/D = 0).
Selects the source of the I/O clock.
CLK_I/E = 1 selects internally generated clock with 200-MHz typ frequency.
CLK_I/E = 0 selects CLK_I as the I/O clock.
Controls the data read with latency (LAT_Y/N = 1) or without latency ((LAT_Y/N = 0). It is essential to
set LAT_Y/N = 0 for the first device in daisy chain or cascade.
Active high signal, indicates a conversion is in progress.
Data read request to the device, also acts as a hand shake signal for daisy chain and cascade
operation.
Status output. Indicates that the bus is being used by the device. Connect to RD of the next device
for daisy chain or cascade operation.
POWER SUPPLY PINS
2
CONVST
I
3
BYTE
I
4
PD
I
5
NAP
I
6
MODE_C/D
I
7
CLK_I/E
I
8
LAT_Y/N
I
46
BUSY
O
47
RD
I
48
BUS_BUSY
O
10, 16,
21, 22,
26, 37
9, 17, 20,
23, 24,
25, 27,
36
44
45
+VA
–
Analog power supply and LVDS input buffer power supply.
AGND
–
Analog ground pins. Short to the analog ground plane below the device.
+VBD
BDGND
–
–
Digital power supply for all CMOS digital inputs and CMOS, LVDS outputs.
Digital ground for all digital inputs and outputs. Short to the analog ground plane below the device.
(2)
The duration from the first rising edge of SYNC_O to the second rising edge of SYNC_O is one data frame. The data frame duration is
16 CLKs if BYTE = 0 or 8 CLKs if BYTE = 1.
8
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ADS8413IBRGZTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-bit Uni Diff In Smp rt 4.75-5.25V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8413IRGZR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-bit Uni Diff In Smp rt 4.75-5.25V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8413IRGZRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-bit Uni Diff In Smp rt 4.75-5.25V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8413IRGZT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-bit Uni Diff In Smp rt 4.75-5.25V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8413IRGZTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-bit Uni Diff In Smp rt 4.75-5.25V RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
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