參數(shù)資料
型號(hào): ADS8413IBRGZRG4
英文描述: 16-BIT, 2-MSPS, LVDS SERIAL INTERFACE, SAR ANALOG-TO-DIGITAL CONVERTER
中文描述: 16位,2 MSPS的LVDS串行接口,SAR類(lèi)比數(shù)位轉(zhuǎn)換器
文件頁(yè)數(shù): 19/38頁(yè)
文件大?。?/td> 1197K
代理商: ADS8413IBRGZRG4
www.ti.com
RD #1
BUS_BUSY #n
(Last device)
CS
CONVST
nth CONV
n + 1 Tracking
n + 1 Conversion
BUS_BUSY #1
RD #2
BUS_BUSY #2
SDO
#1 16Bits
nth conversion
#2 16Bits
nth conversion
SYNC_O
See Figure 6 for details
SYNC_O #1
SYNC_O #2
t
d18
See Figure 15 for details
ADS8413
SLAS490–OCTOBER 2005
Figure 14. Data Read Operation for Devices in Cascade Mode
DATA READ OPERATION
On power up, BUS_BUSY for all of the devices is low. The devices receive CONVST or CSTART to sample and
start the conversion. The first device starts the data read cycle at the end of its conversion. BUS_BUSY of device
1 (connected to RD of device 2) goes high on the read cycle start, indicating that it wants to occupy the bus.
Device 2 BUS_BUSY goes high on the rising edge of RD. This propagates until the last device.
Device 1 BUS_BUSY goes low after it outputs its data, at this time SDO and SYNC_O for device 1 go to 3-state.
The falling edge of BUS_BUSY (RD of the next device) indicates to the next device that it is its turn to output the
data. The next device outputs the data from the last completed conversion. BUS_BUSY of the last device goes
low and its SYNC_O and SDO go to 3-state after it outputs its data. BUS_BUSY of the last device is fed back to
RD of the first device as shown in
Figure 13
(RD can also be tied to 0 for device 1). This ensures that RD of
device 1 is low before its conversion is over. The data read sequence continues with only one external signal,
CONVST or CSTART, when CS = 0. For any device, CS high during the data read cycle 3-states SYNC_O and
SDO of the device and halts the data read sequence. To reset this condition it is necessary to assert CS high for
all of the devices. The new read sequence starts only after CS for all of the devices is low before point A as
shown in
Figure 6
. The high pulse on CS must be at least 20 ns wide. It is better to connect CS for all of the
devices together to avoid undesired halting of the data read sequence.
19
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PDF描述
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