參數(shù)資料
型號(hào): ADS8370IB
英文描述: 16-BIT, 600-kHz, PSEUDO-DIFFERENTIAL INPUT, MICROPOWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH SERIAL INTERFACE AND REFERENCE
中文描述: 16位,600千赫,偽差分輸入,微采樣模數(shù)位串行接口和參考轉(zhuǎn)爐
文件頁(yè)數(shù): 18/29頁(yè)
文件大?。?/td> 782K
代理商: ADS8370IB
www.ti.com
t
su4
t
d6
t
w5
t
w5
SAMPLE
CONVERT
t
CONV
Incomplete
Conversion
Incomplete
Conversion
t
CONV
t
acq1
t
d6
WAIT
SAMPLE
CONVERT
WAIT
CS
CONVST
CONVST_QUAL
(Device Internal)
DEVICE STATE
BUSY
DATA READ OPERATION
ADS8370
SLAS450–JUNE 2005
4. Conversion abort command
An ongoing conversion can be aborted by using the conversion abort command. This is done by forcing
another start of conversion (a valid CONVST_QUAL falling edge) onto an ongoing conversion as shown in
Figure 44
. The device enters the wait state after an aborted conversion. If the previous conversion was
successfully aborted, the device output reads 0xFF00 on SDO.
Figure 44. Conversion Abort
Data read control is independent of conversion control. Data can be read either during conversion or during
sampling. Data that is read during a conversion involves latency of one sample. The start of a new data frame
around the fall of BUSY is constrained by t
su2
, t
su3
, t
h2
, and t
h8
.
1. SPI Interface:
A data read operation in SPI interface mode is shown in
Figure 45
. FS must be tied high for operating in this
mode. The MSB of the output data is available at the falling edge of CS. MSB – 1 is shifted out at the first
rising edge after the first falling edge of SCLK after CS falling edge. Subsequent bits are shifted at the
subsequent rising edges of SCLK. If another data frame is attempted (by pulling CS high and subsequently
low) during an active data frame, then the ongoing frame is aborted and a new frame is started.
18
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