參數(shù)資料
型號: ADS8328IB
英文描述: LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE
中文描述: 低功耗,16位,500千赫,單/雙單極性輸入,模擬到數(shù)字串行接口變換器
文件頁數(shù): 22/40頁
文件大?。?/td> 2759K
代理商: ADS8328IB
www.ti.com
ADS8327/28
+IN/(+IN1 or +IN0)
IN/COM
THS4031
20
20
470 pF
50
Input
Signal
(0 V to 4 V)
5 V
+VA
ADS8327
+IN/(+IN1 or +IN0)
IN/COM
THS4031
20
20
600
1 V DC
600
Input
Signal
(2V to 2 V)
5 V
+VA
470 pF
REFERENCE
The ADS8327/28 can operate with an external reference with a range from 0.3 V to 4.2 V. A clean, low noise,
well-decoupled reference voltage on this pin is required to ensure good performance of the converter. A low
noise band-gap reference like the REF3240 can be used to drive this pin. A 10-
μ
F ceramic decoupling capacitor
is required between the REF+ and REF- pins of the converter. These capacitors should be placed as close as
possible to the pins of the device. The REF- should be connected to its own via to the analog ground plane with
the shortest possible distance.
CONVERTER OPERATION
The ADS8327/28 has an oscillator that is used as an internal clock which controls the conversion rate. The
frequency of this clock is 10.5 MHz minimum. The oscillator is always on unless the device is in the deep
powerdown state or the device is programmed for using SCLK as the conversion clock (CCLK). The minimum
acquisition (sampling) time takes 3 CCLKs (this is equivalent to 238 ns at 12.6 MHz) and the conversion time
takes 18 conversion clocks (CCLK) (~1500 ns) to complete one conversion.
ADS8327
ADS8328
SLAS415A–APRIL 2006–REVISED MAY 2006
THEORY OF OPERATION (continued)
distortion introduced by the filter minimal. In such cases, the gain of the circuit shown in
Figure 53
can be
increased to keep the input to the ADS8327/28 large to keep the SNR of the system high. Note that the gain of
the system from the + input to the output of the THS4031 in such a configuration is a function of the gain of the
AC signal. A resistor divider can be used to scale the output of the REF3225 or REF3240 to reduce the voltage
at the DC input to THS4031 to keep the voltage at the input of the converter within its rated operating range.
Figure 52. Unipolar Input Drive Configuration
Figure 53. Bipolar Input Drive Configuration
The conversion can also be programmed to run based on the external serial clock, SCLK, if is so desired. This
allows a system designer to achieve system synchronization. The serial clock SCLK, is first reduced to 1/2 of its
frequency before it is used as the conversion clock (CCLK). For example, with a 21-MHz SCLK this provides a
10.5-MHz clock for conversions. If it is desired to start a conversion at a specific rising edge of the SCLK when
the external SCLK is programmed as the source of the conversion clock (CCLK) (and manual start of conversion
22
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ADS8328IBPWG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7-5.5V 16-Bit 500KSPS Serial ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8328IBPWR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7-5.5V 16-Bit 500KSPS Serial ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8328IBPWRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7-5.5V 16-Bit 500KSPS Serial ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS8328IBRSAR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7V-5.5V 16B 500 KSPS Ser ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32