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參數(shù)資料
| 型號： | ADS8327IBPWR |
| 英文描述： | LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE |
| 中文描述： | 低功耗，16位，500千赫，單/雙單極性輸入，模擬到數(shù)字串行接口變換器 |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 2759K |
| 代理商： | ADS8327IBPWR |
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DIGITAL INTERFACE
The serial interface is compatible with Motorola SPI. The serial clock is designed to accommodate the latest
high-speed processors with an SCLK up to 50 MHz. Each cycle is started with the falling edge of FS/CS. The
internal data register content which is made available to the output register at the EOC is presented on the SDO
output pin at the falling edge of FS/CS. This is the MSB. Output data are changed at the falling edge of SCLK so
that the host processor can read it at the next rising edge. Serial data input is latched at the falling edge of
SCLK.
Internal Register
WRITING TO THE CONVERTER
There are two different types of writes to the register, a 4-bit write to the CMR and a full 16-bit write to the CMR
plus CFR. The command set is listed in
Table 3
. A simple command requires only 4 SCLKs and the write takes
effect at the 4th falling edge of SCLK. A 16-bit write or read takes at least 16 SCLKs (see
Table 5
for exceptions
that require more than 16 SCLKs).
ADS8327
ADS8328
SLAS415A–APRIL 2006–REVISED MAY 2006
The complete serial I/O cycle starts with the first rising edge of SCLK after the falling edge of FS/CS and ends
16 (see NOTE) falling edges of SCLK later. The serial interface is very flexible. It works with both CPOL = 0 or
CPOL = 1. The interface ignores data if a falling edge arrives before the first rising edge. This means the falling
edge of FS/CS may fall while SCLK is high. The same relaxation applies to the rising edge of FS/CS where
SCLK may be high or low as long as the last SCLK falling edge happens before the rising edge of FS/CS.
NOTE:
There are cases where a cycle is 4 SCLKs or up to 24 SCLKs depending on the read
mode combination. See
Table 3
for details.
The internal register consists of two parts, 4 bits for the command register (CMR) and 12 bits for configuration
data register (CFR).
Table 3. Command Set Defined by Command Register (CMR)
(1)
WAKE UP FROM
AUTO NAP
Y
Y
Y
Y
Y
Y
Y
Y
–
–
–
Y
–
–
–
Y
MINIMUM SCLKs
REQUIRED
4
4
4
4
4
4
4
4
–
–
–
4
16
16
16
4
D[15:12]
HEX
COMMAND
D[11:0]
R/W
0000b
0001b
0010b
0011b
0100b
0101b
0110b
0111b
1000b
1001b
1010b
1011b
1100b
1101b
1110
1111b
0h
1h
2h
3h
4h
5h
6h
7h
8h
9h
Ah
Bh
Ch
Dh
Eh
Fh
Select analog input channel 0
(2)
Select analog input channel 1
(2)
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Wake up
Read CFR
Read data
Write CFR
Default mode (load CFR with default value)
Don't care
Don't care
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Don't care
Don't care
Don't care
CFR Value
Don't care
–
–
–
–
–
–
–
–
–
–
–
W
R
R
W
W
(1)
When SDO is not in 3-state (FS/CS low and SCLK running), the bits from SDO are always part (depending on how many SCLKs are
supplied) of the previous conversion result.
These two commands apply to the ADS8328 only.
(2)
28
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PDF描述 |
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| ADS8327IPW | LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE |
| ADS8327IPWR | LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE |
| ADS8328I | LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE |
| ADS8328IB | LOW POWER, 16-BIT, 500-kHz, SINGLE/DUAL UNIPOLAR INPUT, ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL INTERFACE |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS8327IBPWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7-5.5V 16-Bit 500KSPS Serial ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8327IBRSAR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7V-5.5V 16B 500 KSPS Ser ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8327IBRSARG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7V-5.5V 16B 500 KSPS Ser ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8327IBRSAT | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7V-5.5V 16B 500 KSPS Ser ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8327IBRSATG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2.7V-5.5V 16B 500 KSPS Ser ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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