ADS828
8
SBAS126A
APPLICATION INFORMATION
THEORY OF OPERATION
The ADS828 is a high-speed, CMOS A/D converter which
employs a pipelined converter architecture consisting of
9 internal stages. Each stage feeds its data into the digital
error correction logic ensuring excellent differential linear-
ity and no missing codes at the 10-bit level. The output data
becomes valid on the rising clock edge (see Timing Dia-
gram). The pipeline architecture results in a data latency of
5 clock cycles.
The analog input of the ADS828 is a differential track and
hold (see Figure 1). The differential topology along with
tightly matched capacitors produce a high level of ac-
performance while sampling at very high rates.
The ADS828 allows its analog inputs to be driven either
single-ended or differentially. The typical configuration for
the ADS828 is for the single-ended mode in which the input
track-and-hold performs a single-ended-to-differential con-
version of the analog input signal.
Both inputs (IN, IN) require external biasing using a com-
mon-mode voltage that is typically at the mid-supply level
(+VS/2).
The following application discussion focuses on the single-
ended configuration. Typically, its implementation is easier
to achieve and the rated specifications for the ADS828 are
characterized using the single-ended mode of operation.
DRIVING THE ANALOG INPUT
The ADS828 achieves excellent ac performance either in the
single-ended or differential mode of operation. The selection
for the optimum interface configuration will depend on the
individual application requirements and system structure.
For example, communications applications often process a
band of frequencies that do not include DC, whereas in
imaging applications, the previously restored DC level must
be maintained correctly up to the A/D converter. Features on
the ADS828 such as the input range select (RSEL pin) or the
option for an external reference, provide the needed flexibil-
ity to accommodate a wide range of applications. In any
case, the ADS828 should be configured such that the appli-
cation objectives are met while observing the headroom
requirements of the driving amplifier in order to yield the
best overall performance.
INPUT CONFIGURATIONS
AC-Coupled, Single-Supply Interface
Figure 2 shows the typical circuit for an ac-coupled analog
input configuration of the ADS828 while all components are
powered from a single +5V supply.
With the RSEL pin connected high, the full-scale input
range is set to 2Vp-p. In this configuration, the top and
bottom references (REFT, REFB) provide an output voltage
of +3.5V and +1.5V, respectively. Two resistors ( 2x 1.0k
)
are used to create a common-mode voltage (VCM) of ap-
proximately +2.5V to bias the inputs of the driving amplifier
A1. Using the OPA680 on a single +5V supply, its ideal
common-mode point is at +2.5V, which coincides with the
recommended common-mode input level for the ADS828.
This obviates the need of a coupling capacitor between the
amplifier and the converter. Even though the OPA680 has an
ac gain of +2, the dc gain is only +1 due to the blocking
capacitor at resistor RG.
The addition of a small series resistor (RS) between the
output of the op amp and the input of the ADS828 will be
beneficial in almost all interface configurations. This will
decouple the op amp’s output from the capacitive load and
avoid gain peaking, which can result in increased noise. For
best spurious and distortion performance, the resistor value
should be kept below 100
. Furthermore, the series resistor,
in combination with the 10pF capacitor, establishes a pas-
sive low-pass filter, limiting the bandwidth for the wideband
noise thus, help improving the SNR performance.
AC-Coupled, Dual Supply Interface
The circuit provided in Figure 3 shows typical connections
for the analog input in case the selected amplifier operates
on dual supplies. This might be necessary to take full
advantage of very low distortion operational amplifiers, like
the OPA642. The advantage is that the driving amplifier can
be operated with a ground referenced bipolar signal swing.
This will keep the distortion performance at its lowest since
the signal range stays within the linear region of the op amp
and sufficient headroom to the supply rails can be main-
tained. By capacitively coupling the single-ended signal to
the input of the ADS828, its common-mode requirements
can easily be satisfied with two resistors connected between
the top and bottom reference.
FIGURE 1. Simplified Circuit of Input Track-and-Hold with
Timing Diagram.
φ1
φ2
φ1
φ2
φ1
φ2
φ1
φ2
IN
OUT
Op Amp
Bias
V
CM
Op Amp
Bias
V
CM
C
H
C
I
C
I
C
H
Input Clock (50%)
Internal Non-overlapping Clock