參數(shù)資料
型號： ADS828
英文描述： 10-Bit, 75MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述： 10位，75MHz的采樣模擬數(shù)字轉(zhuǎn)換器
文件頁數(shù)： 2/12頁
文件大?。?/td> 172K
代理商： ADS828
2
ADS828
SPECIFICATIONS
At T
= full specified temperature range, single-ended input range = 1.5V to 3.5V, sampling rate = 75MHz, convert command clock = +3V, external reference unless
otherwise noted.
CMOS
Straight Offset Binary
ADS828E
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
RESOLUTION
SPECIFIED TEMPERATURE RANGE
ANALOG INPUT
Standard Single-Ended Input Range
Optional Single-Ended Input Range
Common-Mode Voltage
Optional Differential Input Range
Analog Input Bias Current
Input Impedance
Track-Mode Input Bandwidth
CONVERSION CHARACTERISTICS
Sample Rate
Data Latency
DYNAMIC CHARACTERISTICS
Differential Linearity Error (largest code error)
f = 1MHz
f = 10MHz
No Missing Codes
Integral Nonlinearity Error, f = 1MHz
Spurious Free Dynamic Range
(1)
f = 1MHz
f = 10MHz
Two-Tone Intermodulation Distortion
(3)
f = 9.5MHz and 9.9MHz (–7dB each tone)
Signal-to-Noise Ratio (SNR)
f = 1MHz
f = 10MHz
Signal-to-(Noise + Distortion) (SINAD)
f = 1MHz
f = 10MHz
Effective Number of Bits
(4)
, f = 1MHz
Output Noise
Aperture Delay Time
Aperture Jitter
Overvoltage Recovery Time
Full-Scale Step Acquisition Time
DIGITAL INPUTS
Logic Family
Convert Command
High Level Input Current
(5)
(V
= 5V)
Low Level Input Current (V
IN
= 0V)
High Level Input Voltage
Low Level Input Voltage
Input Capacitance
DIGITAL OUTPUTS
Logic Family
Logic Coding
Low Output Voltage (I
OL
= 50
μ
A)
Low Output Voltage, (I
OL
= 1.6mA)
High Output Voltage, (I
OH
= 50
μ
A)
High Output Voltage, (I
OH
= 0.5mA)
Low Output Voltage (I
OL
= 50
μ
A)
High Output Voltage, (I
OH
= 50
μ
A)
3-State Enable Time
3-State Disable Time
Output Capacitance
10 Guaranteed
–40 to +85
Bits
°
C
Ambient Air
2Vp-p
1Vp-p
1.5
2
3.5
3
V
V
V
V
μ
A
2.5
2Vp-p
2
3
1
1.25 || 5
300
M
|| pF
MHz
–3dBFS
10k
75M
Samples/s
Clk Cyc
5
±
0.4
±
0.4
±
1.0
LSB
LSB
Guaranteed
±
1.0
±
3.0
LSBs
Referred to Full Scale
70
68
dBFS
(2)
dBFS
–62
dBc
Referred to Full Scale
58
57
dB
dB
55
Referred to Full Scale
57
57
9.3
0.2
3
1.2
2
5
dB
dB
Bits
50
Input Grounded
LSBs rms
ns
ps rms
ns
ns
TTL, +3V/5V CMOS Compatible
Rising Edge of Convert Clock
Start Conversion
100
10
μ
A
μ
A
V
V
pF
+2.0
+0.8
5
VDRV = 5V
+0.1
+0.2
V
V
V
V
V
V
ns
ns
pF
+4.9
+4.8
VDRV = 3V
+0.1
+2.8
OE = L
OE = H
20
2
5
40
10
ACCURACY (Internal Reference, 2Vp-p, Unless Otherwise Noted)
Zero Error (Referred to –FS)
Zero Error Drift (Referred to –FS)
Midscale Offset Error
Gain Error
(6)
Gain Error Drift
(6)
Gain Error
(7)
Gain Error Drift
(7)
Power Supply Rejection of Gain
REFT Tolerance
REFB Tolerance
External REFT Voltage Range
External REFB Voltage Range
Reference Input Resistance
at 25
°
C
±
0.5
1.5
±
0.29
±
1.5
32.3
±
0.75
4.6
68
±
10
±
10
3.5
1.5
1.6
±
3.0
%FS
ppm/
°
C
%FS
%FS
ppm/
°
C
%FS
ppm/
°
C
dB
mV
mV
V
V
k
at 25
°
C
at 25
°
C
±
2.5
at 25
°
C
±
1.5
V
=
±
5%
Deviation from Ideal 3.5V
Deviation From Ideal 1.5V
±
25
±
25
REFB + 0.8
1.25
V
– 1.25
REFT – 0.8
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