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參數(shù)資料
| 型號： | ADS822E |
| 英文描述： | 10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTERS |
| 中文描述： | 10位，40MHz的采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 12/12頁 |
| 文件大?。?/td> | 199K |
| 代理商： | ADS822E |
12
ADS822, ADS825
SNR is given by the following equation. If this value is near
your system requirements, input clock jitter must be reduced.
where:
IN
is input signal frequency
t
A
is rms clock jitter
Particularly in undersampling applications, special consider-
ation should be given to clock jitter. The clock input should
be treated as an analog input in order to achieve the highest
level of performance. Any overshoot or undershoot of the
clock signal may cause degradation of the performance.
When digitizing at high sampling rates, the clock should
have 50% duty cycle (t
H
= t
L
), along with fast rise and fall
times of 2ns or less. The clock input of the ADS825 can be
driven with either 3V or 5V logic levels. Using low-voltage
logic (3V) may lead to improved AC performance of the
converter.
Digital Outputs
The output data format of the ADS822 and ADS825 are in
positive Straight Offset Binary code (see Tables I and II).
This format can easily be converted into the Binary Two’s
Complement code by inverting the MSB.
It is recommended to keep the capacitive loading on the data
lines as low as possible (
≤
15pF). Higher capacitive loading
will cause larger dynamic currents as the digital outputs are
changing. Those high current surges can feed back to the
analog portion of the ADS822 and ADS825 and affect the
performance. If necessary, external buffers or latches close
to the converter’s output pins may be used to minimize the
capacitive loading. They also provide the added benefit of
isolating the ADS822 and ADS825 from any digital noise
activities on the bus coupling back high frequency noise.
+V
S
27
26
GND
ADS822
ADS825
+V
S
15
+
0.1
μ
F
0.1
μ
F
16
GND
10
μ
F
+5V
VDRV
28
0.1
μ
F
+3/+5V
Figure 9. Recommended Bypassing for the Supply Pins.
Digital Output Driver (VDRV)
The ADS822 features a dedicated supply pin for the output
logic drivers, VDRV, which is not internally connected to
the other supply pins. Setting the voltage at VDRV to +5V
or +3V, the ADS822 and ADS825 produce corresponding
logic levels and can directly interface to the selected logic
family. The output stages are designed to supply sufficient
current to drive a variety of logic families. However, it is
recommended to use the ADS822 and ADS825 with +3V
logic supply. This will lower the power dissipation in the
output stages due to the lower output swing and reduce
current glitches on the supply line which may affect the AC-
performance of the converter. In some applications, it might
be advantageous to decouple the VDRV pin with additional
capacitors or a pi-filter.
GROUNDING AND DECOUPLING
Proper grounding and bypassing, short lead length, and the
use of ground planes are particularly important for high
frequency designs. Multilayer PC boards are recommended
for best performance since they offer distinct advantages
like minimizing ground impedance, separation of signal
layers by ground layers, etc. The ADS822 and ADS825
should be treated as analog components. Whenever possible,
the supply pins should be powered by the analog supply.
This will ensure the most consistent results since digital
supply lines often carry high levels of noise which otherwise
would be coupled into the converter and degrade the achiev-
able performance. All ground connections on the ADS822
and ADS825 are internally joined together obviating the
design of split ground planes. The ground pins (1, 16, 26)
should directly connect to an analog ground plane which
covers the PC board area around the converter. While
designing the layout, it is important to keep the analog signal
traces separated from any digital lines to prevent noise
coupling onto the analog signal path. Due to their high
sampling rates, the ADS822 and ADS825 generate high
frequency current transients, and noise (clock feedthrough)
that are fed back into the supply and reference lines. This
requires that all supply and reference pins are sufficiently
bypassed. Figure 9 shows the recommended decoupling
scheme for the ADS822 and ADS825. In most cases, 0.1
μ
F
ceramic chip capacitors at each pin are adequate to keep the
impedance low over a wide frequency range. Their effec-
tiveness largely depends on the proximity to the individual
supply pin. Therefore, they should be located as close to the
supply pins as possible. In addition, a larger bipolar capaci-
tor (1
μ
F to 22
μ
F) should be placed on the PC board in
proximity of the converter circuit.
+FS –1LSB (IN = +3V, IN = +2V)
+1/2 Full Scale
Bipolar Zero (IN = IN = CMV)
–1/2 Full Scale
–FS (IN = +2V, IN = +3V)
11 1111 1111
11 0000 0000
10 0000 0000
01 0000 0000
00 0000 0000
STRAIGHT OFFSET BINARY
(SOB)
DIFFERENTIAL INPUT
TABLE II. Coding Table for Differential Input Configuration
and 2Vp-p Full-Scale Range.
+FS –1LSB (IN = REFT)
+1/2 Full Scale
Bipolar Zero (IN = CMV)
–1/2 Full Scale
–FS (IN = REFB)
11 1111 1111
11 0000 0000
10 0000 0000
01 0000 0000
00 0000 0000
SINGLE-ENDED INPUT
(IN = CMV)
STRAIGHT OFFSET BINARY
(SOB)
TABLE I. Coding Table for Single-Ended Input Configura-
tion with IN Tied to the Common-Mode Voltage
(CMV).
JitterSNR
t
rmssignaltormsnoise
IN
A
=
20
1
2
log
π
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS822E/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10Bit 40MSPS SE/Diff Inp Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS822E/1KG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10Bit 40MSPS SE/Diff Inp Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS822EG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10Bit 40MSPS SE/Diff Inp Int/Ext Ref RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構:Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS823 | 制造商:BB 制造商全稱:BB 功能描述:10-Bit, 60MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS823/ADS826 | 制造商:BB 制造商全稱:BB 功能描述:ADS823. ADS826 - SpeedPlus 10-Bit. 60MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
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