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參數(shù)資料
| 型號： | ADS821 |
| 英文描述： | 10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 10位，40MHz的采樣模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大小： | 384K |
| 代理商： | ADS821 |
www.ti.com
ADS821
SBAS040B
4
PIN
DESIGNATOR
DESCRIPTION
1
2
3
4
5
6
7
8
9
GND
B1
B2
B3
B4
B5
B6
B7
B8
B9
B10
DNC
DNC
GND
+V
S
CLK
+V
S
OE
Ground
Bit 1, Most Significant Bit (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10, Least Significant Bit (LSB)
Do Not Connect
Do Not Connect
Ground
+5V Power Supply
Convert Clock Input, 50% Duty Cycle
+5V Power Supply
HIGH: High-Impedance State. LOW or Floating:
Normal Operation. Internal pull-down resistor.
Most Significant Bit Inversion, HIGH: MSB in-
verted for complementary output. LOW or Float-
ing: Straight output. Internal pull-down resistor.
+5V Power Supply
Bottom Reference Bypass. For external bypass-
ing of internal +1.25V reference.
Common-Mode Voltage. It is derived by (REFT +
REFB)/2.
Top Reference Bypass. For external bypassing
of internal +3.25V reference.
+5V Power Supply
Ground
Input
Complementary Input
Ground
10
11
12
13
14
15
16
17
18
19
MSBI
20
21
+V
S
REFB
22
CM
23
REFT
24
25
26
27
28
+V
S
GND
IN
IN
GND
PIN DESCRIPTIONS
PIN CONFIGURATION
Top View
SO
TIMING DIAGRAM
SYMBOL
DESCRIPTION
MIN
TYP
MAX
UNITS
t
CONV
t
L
t
H
t
D
t
1
t
2
Convert Clock Period
Clock Pulse LOW
Clock Pulse HIGH
Aperture Delay
Data Hold Time, C
L
= 0pF
New Data Delay Time, C
L
= 15pF max
25
12
12
(2)
100
μ
s
ns
ns
ns
ns
ns
ns
12.5
12.5
2
3.9
12.5
NOTES: (1)
“
”
indicates the portion of the waveform that will stretch out at slower sample rates.
(2) t
H
must be 13ns minimum if no missing codes is desired only for the conditions of t
CONV
≤
28ns
and f
IN
< 2MHz for the SO package. For best performance in the SSOP package, t
H
must be 13ns
minimum for all input frequencies and t
CONV
≤
28ns. Refer to the Clock Requirements for a possible
clock skew circuit for this condition.
GND
Bit 1 (MSB)
Bit 2
Bit 3
Bit 4
Bit 5
Bit 6
Bit 7
Bit 8
Bit 9
Bit 10 (LSB)
DNC
DNC
GND
GND
IN
IN
GND
+V
S
REFT
CM
REFB
+V
S
MSBI
OE
+V
S
CLK
+V
S
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
ADS821
DNC: Do Not Connect
Track
Hold
"N"
Hold
"N + 1"
Hold
"N + 2"
Hold
"N + 3"
Hold
"N + 4"
Hold
"N + 5
"
Hold
"N + 6"
Track
Data Valid
N
–
7
Data Valid
N
–
6
Internal
Track-and-Hold
Convert
Clock
Output
Data
t
D
t
2
t
1
DATA LATENCY
(6.5 Clock Cycles)
t
CONV
t
L
t
H
Track
Track
Track
Track
N
–
3
N
–
5
N
–
4
N
–
2
N
–
1
N
Track
Track
Data Valid
N
–
8
(1)
Data Invalid
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS821E | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| ADS821E/1K | 制造商:BB 制造商全稱:BB 功能描述:10-Bit, 40MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS821U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 10-Bit 40 MSPS SE/ Diff Input RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS821U | 制造商:Texas Instruments 功能描述:10 bit sampling analog/digital converter |
| ADS821U | 制造商:Texas Instruments 功能描述:IC 10BIT ADC 40SPS 28-SOIC |
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