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參數(shù)資料
| 型號： | ADS820 |
| 英文描述： | 10-Bit, 20MHz Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 10位，20MHz的采樣模擬數(shù)字轉換器 |
| 文件頁數(shù)： | 9/14頁 |
| 文件大?。?/td> | 295K |
| 代理商： | ADS820 |
9
ADS820
THEORY OF OPERATION
The ADS820 is a high speed sampling analog-to-digital
converter with pipelining. It uses a fully differential archi-
tecture and digital error correction to guarantee 10-bit reso-
lution. The differential track/hold circuit is shown in Figure
1. The switches are controlled by an internal clock which has
a non-overlapping two phase signal,
φ
1 and
φ
2. At the
sampling time the input signal is sampled on the bottom
plates of the input capacitors. In the next clock phase,
φ
2, the
bottom plates of the input capacitors are connected together
and the feedback capacitors are switched to the op amp
output. At this time the charge redistributes between C
I
and
C
H
, completing one track/hold cycle. The differential output
is a held DC representation of the analog input at the sample
time. The track/hold circuit can also convert a single-ended
input signal into a fully differential signal for the quantizer.
The pipelined quantizer architecture has 9 stages with each
stage containing a two-bit quantizer and a two bit digital-to-
analog converter, as shown in Figure 2. Each two-bit quan-
tizer stage converts on the edge of the sub-clock, which is
twice the frequency of the externally applied clock. The
output of each quantizer is fed into its own delay line to
FIGURE 1. Input Track/Hold Configuration with Timing
Signals.
FIGURE 2. Pipeline A/D Architecture.
φ
1
φ
1
φ
2
φ
1
φ
1
φ
1
φ
1
φ
1
φ
2
φ
1
φ
2
φ
1
φ
2
IN
IN
OUT
OUT
Op Amp
Bias
V
CM
Op Amp
Bias
V
CM
C
H
C
I
C
I
C
H
Input Clock (50%)
Internal Non-overlapping Clock
Σ
+
–
B1 (MSB)
B2
B3
B4
B5
B6
B7
B8
B9
B10 (LSB)
2-Bit
DAC
2-Bit
Flash
Input
T/H
Digital Delay
x2
x2
2-Bit
DAC
2-Bit
Flash
Digital Delay
2-Bit
Flash
Digital Delay
2-Bit
DAC
2-Bit
Flash
Digital Delay
x2
D
IN
IN
STAGE 1
STAGE 2
STAGE 8
STAGE 9
Σ
+
–
Σ
+
–
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| ADS8201 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.2V to 5.5V,Low-Power, 12-Bit, 100kSPS, 8-Channel Data Acquisition System with PGA and SPI? Interface |
| ADS8201_1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.2V to 5.5V,Low-Power, 12-Bit, 100kSPS, 8-Channel Data Acquisition System with PGA and SPI? Interface |
| ADS8201IBRGER | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.2V to 5.5V,Low-Power, 12-Bit, 100kSPS, 8-Channel Data Acquisition System with PGA and SPI? Interface |
| ADS8201IBRGET | 制造商:TI 制造商全稱:Texas Instruments 功能描述:2.2V to 5.5V,Low-Power, 12-Bit, 100kSPS, 8-Channel Data Acquisition System with PGA and SPI? Interface |
| ADS8201IRGER | 功能描述:模數(shù)轉換器 - ADC 5.5V-2.7V 12B 200KSPS Serial DAS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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