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參數(shù)資料
| 型號： | ADS7835EB |
| 英文描述： | CMOS Hex Inverting Buffer/Converter 16-CDIP -55 to 125 |
| 中文描述： | 12位，高速，低功耗采樣模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 12/13頁 |
| 文件大?。?/td> | 169K |
| 代理商： | ADS7835EB |
12
ADS7835
logic.
DATA FORMAT
The ADS7835 output data is in Binary Two’s Complement
format as shown in Table III. This table shows the ideal
output code for the given input voltage and does not include
Figure 7 shows a timing diagram that might be used with a
typical digital signal processor such as a TI DSP. For the
Buffered Serial Port (BSP) on the TMS320C54X family,
CONV would tied to BFSX, CLK would be tied to BCLKX,
and DATA would be tied to BDR.
SPI/QSPI INTERFACING
Figure 8 shows the timing diagram for a typical Serial
Peripheral Interface (SPI) or Queued Serial Peripheral Inter-
face (QSPI). Such interfaces are found on a number of
microcontrollers from various manufacturers. CONV would
be tied to a general purpose I/O pin (SPI) or to a PCX pin
(QSPI), CLK would be tied to the serial clock, and DATA
would be tied to the serial input data pin such as MISO
(Master In Slave Out).
Note the time t
DRP
shown in Figure 8. This represents the
maximum amount of time between CONV going LOW and
the start of the conversion clock. Since CONV going LOW
places the S/H in the hold mode and because the hold
capacitor loses charge over time, there is a requirement that
time t
DRP
be met as well as the maximum clock period
D11
(MSB)
DATA
CLK
CONV
D10
D1
D0
(LSB)
2
3
1
4
13
14
15
16
1
2
3
D11
(MSB)
t
ACQ
t
DRP
FIGURE 8. Typical SPI/QSPI Interface Timing.
FIGURE 7. Typical DSP Interface Timing.
D11
(MSB)
DATA
CLK
CONV
D10
D1
D0
(LSB)
1
2
15
16
3
12
13
14
15
16
1
2
3
4
D11
(MSB)
D10
D9
DESCRIPTION
ANALOG INPUT
DIGITAL OUTPUT
Full-Scale Input
Range
Least Significant Bit
(LSB)
(2)
BINARY TWO’S
COMPLEMENT
BINARY
CODE
–V
REF
to +V
REF(1)
HEX
CODE
(–V
REF
to +V
REF
)/4096
2.49878V
0V
–0.00122V
–2.49878V
+Full Scale
Mid-Scale
Mid-Scale –1LSB
–Full Scale
0111 1111 1111
0000 0000 0000
1111 1111 1111
1000 0000 0000
7FF
000
FFF
800
NOTES: (1) –2.5V to +2.5V when the internal reference is used. (2) 1.22mV
with a 2.5V reference.
TABLE III. Ideal Input Voltages and Output Codes.
the effects of offset, gain, or noise.
DSP INTERFACING
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7835EB/250 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7835EB/250G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7835EB/2K5 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7835EB/2K5G4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit High Speed Low Power Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7835EB250 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:12-Bit, High-Speed, Low Power Sampling ANALOG-TO-DIGITAL CONVERTER |
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