- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄364641 > ADS7830IPWT 8-Bit, 8-Channel Sampling ANALOG-TO-DIGITAL CONVERTER with I2C⑩ Interface PDF資料下載
參數(shù)資料
| 型號： | ADS7830IPWT |
| 英文描述： | 8-Bit, 8-Channel Sampling ANALOG-TO-DIGITAL CONVERTER with I2C⑩ Interface |
| 中文描述： | 8位，8通道采樣模擬到數(shù)字轉(zhuǎn)換接口的I2C⑩ |
| 文件頁數(shù)： | 12/16頁 |
| 文件大?。?/td> | 251K |
| 代理商： | ADS7830IPWT |
ADS7830
SBAS302
12
www.ti.com
READING DATA
Data can be read from the ADS7830 by read-addressing the
part (LSB of address byte set to 1) and receiving the
transmitted byte. Converted data can only be read from the
ADS7830 once a conversion has been initiated as described
in the preceding section.
Each 8-bit data word is returned in one byte, as shown
below, where D7 is the MSB of the data word, and D0 is the
LSB.
modes. It may be desirable to remain in HS mode after
reading a conversion; to do this, issue a repeated START
instead of a STOP at the end of the read sequence, since a
STOP causes the part to return to F/S mode.
LAYOUT
For optimum performance, care should be taken with the
physical layout of the ADS7830 circuitry. The basic SAR
architecture is sensitive to glitches or sudden changes on the
power supply, reference, ground connections, and digital
inputs that occur just prior to latching the output of the analog
comparator. Therefore, during any single conversion for an
“
n-bit
”
SAR converter, there are n
“
windows
”
in which large
external transient voltages can easily affect the conversion
result. Such glitches might originate from switching power
supplies, nearby digital logic, and high-power devices.
With this in mind, power to the ADS7830 should be clean and
well-bypassed. A 0.1
μ
F ceramic bypass capacitor should be
placed as close to the device as possible. A 1
μ
F to 10
μ
F
capacitor may also be needed if the impedance of the
connection between +V
DD
and the power supply is high.
The ADS7830 architecture offers no inherent rejection of
noise or voltage variation in regards to using an external
reference input. This is of particular concern when the
reference input is tied to the power supply. Any noise and
ripple from the supply will appear directly in the digital results.
While high-frequency noise can be filtered out, voltage varia-
tion due to line frequency (50Hz or 60Hz) can be difficult to
remove.
The GND pin should be connected to a clean ground point.
In many cases, this will be the
“
analog
”
ground. Avoid
connections that are too near the grounding point of a
microcontroller or digital signal processor. The ideal layout
will include an analog ground plane dedicated to the con-
verter and associated analog circuitry.
MSB
6
5
4
3
2
1
LSB
DATA
D7
D6
D5
D4
D3
D2
D1
D0
READING IN F/S MODE
Figure 3 describes the interaction between the master and
the slave ADS7830 in Fast or Standard (F/S) mode. At the
end of reading conversion data the ADS7830 can be issued
a repeated START condition by the master to secure bus
operation for subsequent conversions of the A/D converter.
This would be the most efficient way to perform continuous
conversions.
READING IN HS MODE
High Speed (HS) mode is fast enough that codes can be
read out
one at a time. In HS mode, there is not enough time
for a single conversion to complete between the reception of
a repeated START condition and the read-addressing byte,
so the ADS7830 stretches the clock after the read-address-
ing byte has been fully received, holding it LOW until the
conversion is complete.
See Figure 4 for a typical read sequence for HS mode.
Included in the read sequence is the shift from F/S to HS
FIGURE 3. Typical Read Sequence in F/S Mode.
Sr
A1
1
0
0
1
0
A0
R
A
D5
D4
D3
D2
D1
D0
N
P
D7
D6
S
A1
1
0
0
1
0
A0
W
A
SD
C2
C1
C0PD1PD0
X
X
A
ADC Power-Down Mode
Read-Addressing Byte
1 x (8 Bits + not-ack)
From Master to Slave
A = acknowledge (SDA LOW)
N = not acknowledge (SDA HIGH)
S = START Condition
P = STOP Condition
Sr = repeated START condition
W = '0' (WRITE)
R = '1' (READ)
From Slave to Master
Write-Addressing Byte
ADC Converting Mode
Command Byte
ADC Power-Down Mode
(depending on power-down selection bits)
ADC Sampling Mode
See Note (1)
NOTE: (1) To secure bus operation and loop back to the stage of write-addressing for next conversion, use repeated START.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADS7862 | CMOS 4-Bit-by-16-Word FIFO Register 16-CDIP -55 to 125 |
| ADS7862Y | Dual 500kHz, 12-Bit, 2 2 Channel Simultaneous Sampling ANALOG-TO-DIGITAL CONVERTER |
| ADS7862YB | CMOS Hex Schmitt Triggers 14-PDIP -55 to 125 |
| ADS7870 | 12-Bit ADC, MUX, PGA and Internal Reference DATA ACQUISITION SYSTEM |
| ADS7870EA | 12-Bit ADC, MUX, PGA and Internal Reference DATA ACQUISITION SYSTEM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7830IPWT | 制造商:Texas Instruments 功能描述:A/D Converter (A-D) IC |
| ADS7830IPWTG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 8-Bit 8-Ch Sampling w/I2C Interface RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7831 | 制造商:BB 制造商全稱:BB 功能描述:12-Bit 600kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER |
| ADS7831 WAF | 制造商:Texas Instruments 功能描述: |
| ADS7831P | 制造商:Rochester Electronics LLC 功能描述:12-BIT, 600KHZ,SAMPLING A/D - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。