參數(shù)資料
型號： ADS7825UB/1K
廠商： Texas Instruments
文件頁數(shù)： 20/21頁
文件大?。?/td> 0K
描述： IC 16-BIT 4-CHAN MUX A/D 28-SOIC
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 1,000
位數(shù)： 16
采樣率（每秒）： 40k
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 50mW
電壓電源： 單電源
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 28-SOIC（0.295"，7.50mm 寬）
供應(yīng)商設(shè)備封裝： 28-SOIC
包裝： 帶卷 (TR)
輸入數(shù)目和類型： 4 個(gè)單端，雙極
8
ADS7825
STARTING A CONVERSION
The combination of CS (pin 23) and R/C (pin 22) LOW for
a minimum of 40ns places the sample/hold of the ADS7825
in the hold state and starts conversion ‘n’. BUSY (pin 24)
will go LOW and stay LOW until conversion ‘n’ is com-
pleted and the internal output register has been updated. All
new convert commands during BUSY LOW will be ignored.
CS and/or R/C must go HIGH before BUSY goes HIGH or
a new conversion will be initiated without sufficient time to
acquire a new signal.
The ADS7825 will begin tracking the input signal at the end
of the conversion. Allowing 25
s between convert com-
mands assures accurate acquisition of a new signal. Refer to
Tables Ia and Ib for a summary of CS, R/C, and BUSY states
and Figures 2 through 6 and Table II for timing information.
CS and R/C are internally OR’d and level triggered. There
is not a requirement which input goes LOW first when
initiating a conversion. If, however, it is critical that CS or
R/C initiates conversion ‘n’, be sure the less critical input is
LOW at least 10ns prior to the initiating input. If EXT/INT
(pin 12) is LOW when initiating conversion ‘n’, serial data
from conversion ‘n – 1’ will be output on SDATA (pin 16)
following the start of conversion ‘n’. See Internal Data
Clock in the Reading Data section.
To reduce the number of control pins, CS can be tied LOW
using R/C to control the read and convert modes. This will
have no effect when using the internal data clock in the serial
output mode. However, the parallel output and the serial
output (only when using an external data clock) will be
affected whenever R/C goes HIGH. Refer to the Reading
Data section and Figures 2, 3, 5, and 6.
TABLE Ia. Read Control for Parallel Data (PAR/SER = 5V.)
INPUTS
OUTPUTS
CS
R/C
BYTE
CONTC
PWRD
BUSY
D7
D6
D5
D4
D3
D2
D1
D0
COMMENTS
1
X
Hi-Z
X
0
X
Hi-Z
0
1
0
X
D15
D14
D13
D12
D11
D10
D9
D8
Results from last
(MSB)
completed conversion.
0
1
X
D7
D6
D5
D4
D3
D2
D1
D0
Results from last
(LSB)
completed conversion.
01
XX
X
↑
↑↓
↑↓↑↓↑↓
Data will change at the
end of a conversion.
D4
D3
D2
D1
D0
CS
R/C
CONTC PWRD
BUSY
D7, D6, D5 EXT/INT
SYNC
DATACLK
SDATA
TAG
Input
Output
Input
Output
I/O
Output
Input COMMENTS
1
X
1
Hi-Z
LOW
Output
Hi-Z
X
0
X
1
Hi-Z
LOW
Output
Hi-Z
X
0
↓
0
X
1
HI-Z
LOW
Output
X
Starts transmission of data from previous
conversion on SDATA synchronized to 16
pulses output on DATACLK.
↓
0
X
1
Hi-Z
LOW
Output
X
Starts transmission of data from previous
conversion on SDATA synchronized to 16
pulses output on DATACLK.
0
1
0
X
Hi-Z
HIGH
LOW
Input
Output
Input The level output on SDATA will be the level
input on TAG 16 DATACLK input cycles.
0
10X
↑
Hi-Z
HIGH
LOW
Input
Output
Input At the end of the conversion, when BUSY
rises, data from the conversion will be shifted
into the output registers. If DATACLK is HIGH,
valid data will be lost.
0
↑
0
X
1
Hi-Z
HIGH
LOW
Input
Output
X
Initiates transmission of a HIGH pulse on
SYNC followed by data from last completed
conversion on SDATA synchronized to the
input on DATACLK.
↓
1
0
X
1
Hi-Z
HIGH
LOW
Input
Output
X
Initiates transmission of a HIGH pulse on
SYNC followed by data from last completed
conversion on SDATA synchronized to the
input on DATACLK.
00
1
0
↓
Hi-Z
LOW
Output
X
Starts transmission of data from previous
conversion on SDATA synchronized to 16
pulses output on DATACLK
↓
1
X
Hi-Z
HIGH
Output
Input
Output
X
SDATA becomes active. Inputs on DATACLK
shift out data.
0
↑
X
Hi-Z
HIGH
Output
Input
Output
X
SDATA becomes active. Inputs on DATACLK
shift out data.
↓
0
1
X
Hi-Z
LOW
Output
X
Restarts continuous conversion mode (n – 1 data
transmitted when BUSY is LOW).
0
↓
1
X
Hi-Z
LOW
Output
X
Restarts continuous conversion mode (n – 1 data
transmitted when BUSY is LOW).
TABLE Ib. Read Control for Serial Data (PAR/SER = 0V.)
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